Giacomo Travaglini has submitted this change. (
https://gem5-review.googlesource.com/c/public/gem5/+/56601 )
(
3 is the latest approved patch-set.
No files were changed between the latest approved patch-set and the
submitted one.
)Change subject: arch-arm: Add helper MISCREG to track a pending DVM
operation
......................................................................
arch-arm: Add helper MISCREG to track a pending DVM operation
We are introducing the MISCREG_TLBINEEDSYNC misc register to track
the presence of a pending DVM (TLBI) operation.
It will be used by:
* TLBI instructions: setting up the flag to indicate there
is a pending DVM message
* DSB instruction: clearing the flag indicating the DVM
messgage has been syncronized
Change-Id: I7a599ada5a6ac6f86ed2260caa872f085c889ab5
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/56601
Reviewed-by: Andreas Sandberg <andreas.sandb...@arm.com>
Maintainer: Andreas Sandberg <andreas.sandb...@arm.com>
Tested-by: kokoro <noreply+kok...@google.com>
---
M src/arch/arm/regs/misc.cc
M src/arch/arm/regs/misc.hh
2 files changed, 28 insertions(+), 0 deletions(-)
Approvals:
Andreas Sandberg: Looks good to me, approved; Looks good to me, approved
kokoro: Regressions pass
diff --git a/src/arch/arm/regs/misc.cc b/src/arch/arm/regs/misc.cc
index ec655c1..5486bbc 100644
--- a/src/arch/arm/regs/misc.cc
+++ b/src/arch/arm/regs/misc.cc
@@ -1432,6 +1432,8 @@
.allPrivileges();
InitReg(MISCREG_SEV_MAILBOX)
.allPrivileges();
+ InitReg(MISCREG_TLBINEEDSYNC)
+ .allPrivileges().exceptUserMode();
// AArch32 CP14 registers
InitReg(MISCREG_DBGDIDR)
diff --git a/src/arch/arm/regs/misc.hh b/src/arch/arm/regs/misc.hh
index d06684a..9b517a7 100644
--- a/src/arch/arm/regs/misc.hh
+++ b/src/arch/arm/regs/misc.hh
@@ -90,6 +90,7 @@
MISCREG_PMXEVTYPER_PMCCFILTR,
MISCREG_SCTLR_RST,
MISCREG_SEV_MAILBOX,
+ MISCREG_TLBINEEDSYNC,
// AArch32 CP14 registers (debug/trace/ThumbEE/Jazelle control)
MISCREG_DBGDIDR,
@@ -1302,6 +1303,7 @@
"pmxevtyper_pmccfiltr",
"sctlr_rst",
"sev_mailbox",
+ "tlbi_needsync",
// AArch32 CP14 registers
"dbgdidr",
--
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Gerrit-Project: public/gem5
Gerrit-Branch: develop
Gerrit-Change-Id: I7a599ada5a6ac6f86ed2260caa872f085c889ab5
Gerrit-Change-Number: 56601
Gerrit-PatchSet: 6
Gerrit-Owner: Giacomo Travaglini <giacomo.travagl...@arm.com>
Gerrit-Reviewer: Andreas Sandberg <andreas.sandb...@arm.com>
Gerrit-Reviewer: Giacomo Travaglini <giacomo.travagl...@arm.com>
Gerrit-Reviewer: kokoro <noreply+kok...@google.com>
Gerrit-MessageType: merged
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