Giacomo Travaglini has uploaded this change for review. (
https://gem5-review.googlesource.com/c/public/gem5/+/58509 )
Change subject: mem: Introduce Request::isMemCmd to cover memory commands
......................................................................
mem: Introduce Request::isMemCmd to cover memory commands
It will check if the request is a TLB invalidation
or a transactional memory request
Change-Id: I84351a13a6806d8119e4efa8ef98ab150976c8ab
Signed-off-by: Giacomo Travaglini <giacomo.travagl...@arm.com>
---
M src/mem/request.hh
1 file changed, 15 insertions(+), 1 deletion(-)
diff --git a/src/mem/request.hh b/src/mem/request.hh
index 8b6527c..40d8f6b 100644
--- a/src/mem/request.hh
+++ b/src/mem/request.hh
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2012-2013,2017-2021 Arm Limited
+ * Copyright (c) 2012-2013,2017-2022 Arm Limited
* All rights reserved
*
* The license below extends only to copyright in the software and shall
@@ -1018,6 +1018,7 @@
return (isTlbi() || isTlbiSync() ||
isTlbiExtSync() || isTlbiExtSyncComp());
}
+ bool isMemCmd() const { return isTlbiCmd() || isHTMCmd(); }
bool
isAtomic() const
--
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Gerrit-Project: public/gem5
Gerrit-Branch: develop
Gerrit-Change-Id: I84351a13a6806d8119e4efa8ef98ab150976c8ab
Gerrit-Change-Number: 58509
Gerrit-PatchSet: 1
Gerrit-Owner: Giacomo Travaglini <giacomo.travagl...@arm.com>
Gerrit-MessageType: newchange
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