Jin Cui has submitted this change. (
https://gem5-review.googlesource.com/c/public/gem5/+/58649 )
Change subject: cpu-o3: Resolve circular buffer issue for LSQ
......................................................................
cpu-o3: Resolve circular buffer issue for LSQ
--since int is only 4 bytes, while ssize_t is 8 bytes in 64bit
system. so 0x80000000 is regarded as negative value.
Jira Issue:: https://gem5.atlassian.net/browse/GEM5-1203
Change-Id: I74b3785b29751f777f5e154692fa60bf62b37b9f
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/58649
Reviewed-by: Giacomo Travaglini <giacomo.travagl...@arm.com>
Maintainer: Giacomo Travaglini <giacomo.travagl...@arm.com>
Tested-by: kokoro <noreply+kok...@google.com>
---
M src/cpu/o3/lsq.cc
M src/cpu/o3/lsq.hh
M src/cpu/o3/lsq_unit.cc
M src/cpu/o3/lsq_unit.hh
4 files changed, 30 insertions(+), 12 deletions(-)
Approvals:
Giacomo Travaglini: Looks good to me, approved; Looks good to me, approved
kokoro: Regressions pass
diff --git a/src/cpu/o3/lsq.cc b/src/cpu/o3/lsq.cc
index 375093a..752298a 100644
--- a/src/cpu/o3/lsq.cc
+++ b/src/cpu/o3/lsq.cc
@@ -1432,7 +1432,7 @@
}
Fault
-LSQ::read(LSQRequest* request, int load_idx)
+LSQ::read(LSQRequest* request, ssize_t load_idx)
{
assert(request->req()->contextId() == request->contextId());
ThreadID tid = cpu->contextToThread(request->req()->contextId());
@@ -1441,7 +1441,7 @@
}
Fault
-LSQ::write(LSQRequest* request, uint8_t *data, int store_idx)
+LSQ::write(LSQRequest* request, uint8_t *data, ssize_t store_idx)
{
ThreadID tid = cpu->contextToThread(request->req()->contextId());
diff --git a/src/cpu/o3/lsq.hh b/src/cpu/o3/lsq.hh
index 1d4ecfd..5f6ec50 100644
--- a/src/cpu/o3/lsq.hh
+++ b/src/cpu/o3/lsq.hh
@@ -832,12 +832,12 @@
/** Executes a read operation, using the load specified at the load
* index.
*/
- Fault read(LSQRequest* request, int load_idx);
+ Fault read(LSQRequest* request, ssize_t load_idx);
/** Executes a store operation, using the store specified at the store
* index.
*/
- Fault write(LSQRequest* request, uint8_t *data, int store_idx);
+ Fault write(LSQRequest* request, uint8_t *data, ssize_t store_idx);
/**
* Retry the previous send that failed.
diff --git a/src/cpu/o3/lsq_unit.cc b/src/cpu/o3/lsq_unit.cc
index 856cef3..5fe9c5f 100644
--- a/src/cpu/o3/lsq_unit.cc
+++ b/src/cpu/o3/lsq_unit.cc
@@ -660,7 +660,7 @@
// Make sure that a store exists.
assert(storeQueue.size() != 0);
- int store_idx = store_inst->sqIdx;
+ ssize_t store_idx = store_inst->sqIdx;
DPRINTF(LSQUnit, "Executing store PC %s [sn:%lli]\n",
store_inst->pcState(), store_inst->seqNum);
@@ -1046,7 +1046,7 @@
if (isStalled() &&
storeWBIt->instruction()->seqNum == stallingStoreIsn) {
DPRINTF(LSQUnit, "Unstalling, stalling store [sn:%lli] "
- "load idx:%i\n",
+ "load idx:%li\n",
stallingStoreIsn, stallingLoadIdx);
stalled = false;
stallingStoreIsn = 0;
@@ -1172,7 +1172,7 @@
if (isStalled() &&
store_inst->seqNum == stallingStoreIsn) {
DPRINTF(LSQUnit, "Unstalling, stalling store [sn:%lli] "
- "load idx:%i\n",
+ "load idx:%li\n",
stallingStoreIsn, stallingLoadIdx);
stalled = false;
stallingStoreIsn = 0;
@@ -1282,7 +1282,7 @@
}
Fault
-LSQUnit::read(LSQRequest *request, int load_idx)
+LSQUnit::read(LSQRequest *request, ssize_t load_idx)
{
LQEntry& load_entry = loadQueue[load_idx];
const DynInstPtr& load_inst = load_entry.instruction();
@@ -1567,7 +1567,7 @@
}
Fault
-LSQUnit::write(LSQRequest *request, uint8_t *data, int store_idx)
+LSQUnit::write(LSQRequest *request, uint8_t *data, ssize_t store_idx)
{
assert(storeQueue[store_idx].valid());
diff --git a/src/cpu/o3/lsq_unit.hh b/src/cpu/o3/lsq_unit.hh
index e68cb53..a2db53d 100644
--- a/src/cpu/o3/lsq_unit.hh
+++ b/src/cpu/o3/lsq_unit.hh
@@ -485,7 +485,7 @@
*/
InstSeqNum stallingStoreIsn;
/** The index of the above store. */
- int stallingLoadIdx;
+ ssize_t stallingLoadIdx;
/** The packet that needs to be retried. */
PacketPtr retryPkt;
@@ -539,10 +539,10 @@
public:
/** Executes the load at the given index. */
- Fault read(LSQRequest *request, int load_idx);
+ Fault read(LSQRequest *request, ssize_t load_idx);
/** Executes the store at the given index. */
- Fault write(LSQRequest *request, uint8_t *data, int store_idx);
+ Fault write(LSQRequest *requst, uint8_t *data, ssize_t store_idx);
/** Returns the index of the head load instruction. */
int getLoadHead() { return loadQueue.head(); }
--
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Gerrit-Project: public/gem5
Gerrit-Branch: develop
Gerrit-Change-Id: I74b3785b29751f777f5e154692fa60bf62b37b9f
Gerrit-Change-Number: 58649
Gerrit-PatchSet: 2
Gerrit-Owner: Jin Cui <cuijinb...@gmail.com>
Gerrit-Reviewer: Giacomo Travaglini <giacomo.travagl...@arm.com>
Gerrit-Reviewer: Jin Cui <cuijinb...@gmail.com>
Gerrit-Reviewer: kokoro <noreply+kok...@google.com>
Gerrit-MessageType: merged
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