Hoa Nguyen has uploaded this change for review. ( https://gem5-review.googlesource.com/c/public/gem5/+/65031?usp=email )

Change subject: stdlib: Parameterize the number of cores of the RISCVMatchedBoard
......................................................................

stdlib: Parameterize the number of cores of the RISCVMatchedBoard

Change-Id: I3a65ac2a5c6c6068cd82ad2a09dd5a16a66f5a55
Signed-off-by: Hoa Nguyen <hoangu...@ucdavis.edu>
---
M src/python/gem5/prebuilt/riscvmatched/riscvmatched_board.py
M src/python/gem5/prebuilt/riscvmatched/riscvmatched_processor.py
2 files changed, 22 insertions(+), 5 deletions(-)



diff --git a/src/python/gem5/prebuilt/riscvmatched/riscvmatched_board.py b/src/python/gem5/prebuilt/riscvmatched/riscvmatched_board.py
index 469010c..db75825 100644
--- a/src/python/gem5/prebuilt/riscvmatched/riscvmatched_board.py
+++ b/src/python/gem5/prebuilt/riscvmatched/riscvmatched_board.py
@@ -108,6 +108,10 @@

     def __init__(
         self,
+        num_cores: int = 0,  # If num_cores <= 0, the simulated system will
+        # have 4 cores in FS mode and 1 core in SE mode.
+        # If num_cores > 0, the simulated system will
+        # have num_cores number of cores.
         clk_freq: str = "1.2GHz",
         l2_size: str = "2MB",
         is_fs: bool = False,
diff --git a/src/python/gem5/prebuilt/riscvmatched/riscvmatched_processor.py b/src/python/gem5/prebuilt/riscvmatched/riscvmatched_processor.py
index 838f810..93cc25b 100644
--- a/src/python/gem5/prebuilt/riscvmatched/riscvmatched_processor.py
+++ b/src/python/gem5/prebuilt/riscvmatched/riscvmatched_processor.py
@@ -47,9 +47,12 @@
         self._cpu_type = CPUTypes.MINOR
         super().__init__(cores=self._create_cores(is_fs))

-    def _create_cores(self, is_fs: bool):
-        if is_fs:
-            num_cores = 4
+    def _create_cores(self, is_fs: bool, num_cores: int = 0):
+        if num_cores <= 0:
+            if is_fs:
+                _num_cores = 4
+            else:
+                _num_cores = 1
         else:
-            num_cores = 1
-        return [U74Core(core_id=i) for i in range(num_cores)]
+            _num_cores = num_cores
+        return [U74Core(core_id=i) for i in range(_num_cores)]

--
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Gerrit-Project: public/gem5
Gerrit-Branch: develop
Gerrit-Change-Id: I3a65ac2a5c6c6068cd82ad2a09dd5a16a66f5a55
Gerrit-Change-Number: 65031
Gerrit-PatchSet: 1
Gerrit-Owner: Hoa Nguyen <hoangu...@ucdavis.edu>
Gerrit-MessageType: newchange
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