See <https://jenkins.gem5.org/job/nightly/406/display/redirect?page=changes>

Changes:

[shunhsingou] util: update termios to replace nl with cr-nl

[Giacomo Travaglini] arch-arm: Fix access permissions for GICv3 cpu registers

[Giacomo Travaglini] arch-arm: Fix GICv3 List register mapping

[Giacomo Travaglini] arch-arm: Remove ISA::haveGICv3CpuIfc method

[Bobby R. Bruce] python,stdlib: Add multiprocessing module

[yuhsingw] ext: upgrade to googletest 1.12.0

[shunhsingou] sim: allow specifying remote gdb port for each workload

[fcrh] mem: Fix SHM server path cleanup logic


------------------------------------------
[...truncated 415.56 KB...]
 [SO Param] m5.objects.PowerISA, PowerISA -> ALL/python/_m5/param_PowerISA.cc
 [SO Param] m5.objects.Compressors, PerfectCompressor -> 
ALL/python/_m5/param_PerfectCompressor.cc
 [SO Param] m5.objects.I82094AA, I82094AA -> ALL/python/_m5/param_I82094AA.cc
 [SO Param] m5.objects.GUPSGen, GUPSGen -> ALL/params/GUPSGen.hh
 [SO Param] m5.objects.Probe, ProbeListenerObject -> 
ALL/python/_m5/param_ProbeListenerObject.cc
 [SO Param] m5.objects.Directory_Controller, Directory_Controller -> 
ALL/python/_m5/param_Directory_Controller.cc
 [SO Param] m5.objects.ReplacementPolicies, WeightedLRURP -> 
ALL/python/_m5/param_WeightedLRURP.cc
 [     CXX] ALL/python/_m5/param_I82094AA.cc -> .o
 [     CXX] ALL/python/_m5/param_GUPSGen.cc -> .o
 [     CXX] ALL/cpu/testers/traffic_gen/gups_gen.cc -> .o
 [SO Param] m5.objects.RiscvTLB, RiscvTLB -> ALL/python/_m5/param_RiscvTLB.cc
 [ENUMDECL] m5.objects.IntelMP, X86IntelMPTriggerMode -> 
ALL/enums/X86IntelMPTriggerMode.hh
 [     CXX] ALL/python/_m5/param_RiscvTLB.cc -> .o
 [SO Param] m5.objects.Gic, ArmInterruptPin -> 
ALL/python/_m5/param_ArmInterruptPin.cc
 [SO Param] m5.objects.BranchPredictor, TAGE_SC_L_TAGE_8KB -> 
ALL/python/_m5/param_TAGE_SC_L_TAGE_8KB.cc
 [     CXX] ALL/python/_m5/param_ArmInterruptPin.cc -> .o
 [SO Param] m5.objects.I2C, I2CDevice -> ALL/params/I2CDevice.hh
 [SO Param] m5.objects.ElasticTrace, ElasticTrace -> ALL/params/ElasticTrace.hh
 [SO Param] m5.objects.DirectoryMemory, RubyDirectoryMemory -> 
ALL/python/_m5/param_RubyDirectoryMemory.cc
 [     CXX] ALL/python/_m5/param_I2CBus.cc -> .o
 [     CXX] ALL/cpu/o3/probe/elastic_trace.cc -> .o
 [     CXX] ALL/dev/i2c/bus.cc -> .o
 [SO Param] m5.objects.NoMali, CustomNoMaliGpu -> ALL/params/CustomNoMaliGpu.hh
 [     CXX] ALL/python/_m5/param_CustomNoMaliGpu.cc -> .o
 [     CXX] ALL/dev/arm/gpu_nomali.cc -> .o
 [SO Param] m5.objects.RealView, Pl050 -> ALL/python/_m5/param_Pl050.cc
 [SO Param] m5.objects.Cache, Cache -> ALL/params/Cache.hh
 [     CXX] ALL/python/_m5/param_Cache.cc -> .o
 [     CXX] ALL/mem/cache/cache.cc -> .o
 [SO Param] m5.objects.PS2, PS2Device -> ALL/params/PS2Device.hh
 [SO Param] m5.objects.ClockDomain, DerivedClockDomain -> 
ALL/python/_m5/param_DerivedClockDomain.cc
 [SO Param] m5.objects.TlmBridge, Gem5ToTlmBridge64 -> 
ALL/params/Gem5ToTlmBridge64.hh
 [     CXX] ALL/dev/x86/south_bridge.cc -> .o
 [     CXX] ALL/arch/x86/interrupts.cc -> .o
 [     CXX] ALL/python/_m5/param_Gem5ToTlmBridge64.cc -> .o
 [     CXX] ALL/systemc/tlm_bridge/gem5_to_tlm.cc -> .o
 [     CXX] ALL/python/_m5/param_SouthBridge.cc -> .o
 [     CXX] ALL/dev/x86/i8042.cc -> .o
 [     CXX] ALL/python/_m5/param_I8042.cc -> .o
 [     CXX] ALL/dev/x86/pc.cc -> .o
 [     CXX] ALL/python/_m5/param_Pl050.cc -> .o
 [     CXX] ALL/python/_m5/param_Pc.cc -> .o
 [     CXX] ALL/dev/arm/kmi.cc -> .o
 [SO Param] m5.objects.VirtIOBlock, VirtIOBlock -> 
ALL/python/_m5/param_VirtIOBlock.cc
 [     CXX] ALL/arch/arm/generated/generic_cpu_exec_2.cc -> .o
 [     CXX] ALL/python/_m5/param_VirtIOBlock.cc -> .o
 [     CXX] ALL/arch/arm/isa.cc -> .o
 [     CXX] ALL/arch/arm/generated/decoder.cc -> .o
 [     CXX] ALL/arch/arm/insts/data64.cc -> .o
 [     CXX] ALL/python/_m5/param_ArmTableWalker.cc -> .o
 [     CXX] ALL/arch/arm/generated/generic_cpu_exec_5.cc -> .o
 [     CXX] ALL/arch/arm/insts/sve_mem.cc -> .o
 [     CXX] ALL/arch/arm/decoder.cc -> .o
 [     CXX] ALL/arch/arm/regs/int.cc -> .o
 [     CXX] ALL/arch/arm/table_walker.cc -> .o
 [     CXX] ALL/arch/arm/insts/mem64.cc -> .o
 [     CXX] ALL/arch/arm/insts/branch.cc -> .o
 [     CXX] ALL/arch/arm/tlb.cc -> .o
 [     CXX] ALL/arch/arm/insts/pred_inst.cc -> .o
 [     CXX] ALL/arch/arm/generated/generic_cpu_exec_1.cc -> .o
 [     CXX] ALL/arch/arm/pmu.cc -> .o
 [     CXX] ALL/arch/arm/insts/sve.cc -> .o
 [     CXX] ALL/arch/arm/generated/generic_cpu_exec_4.cc -> .o
 [     CXX] ALL/python/_m5/param_ArmISA.cc -> .o
 [     CXX] ALL/arch/arm/insts/mem.cc -> .o
 [     CXX] ALL/arch/arm/mmu.cc -> .o
 [     CXX] ALL/arch/arm/tracers/tarmac_record_v8.cc -> .o
 [     CXX] ALL/arch/arm/stage2_lookup.cc -> .o
 [     CXX] ALL/arch/arm/insts/misc64.cc -> .o
 [     CXX] ALL/arch/arm/generated/inst-constrs-3.cc -> .o
 [     CXX] ALL/arch/arm/insts/tme64classic.cc -> .o
 [     CXX] ALL/arch/arm/utility.cc -> .o
 [     CXX] ALL/arch/arm/insts/static_inst.cc -> .o
 [     CXX] ALL/arch/arm/generated/generic_cpu_exec_3.cc -> .o
 [     CXX] ALL/arch/arm/generated/generic_cpu_exec_6.cc -> .o
 [     CXX] ALL/arch/arm/generated/inst-constrs-1.cc -> .o
 [     CXX] ALL/arch/arm/insts/macromem.cc -> .o
 [     CXX] ALL/python/_m5/param_ArmMMU.cc -> .o
 [     CXX] ALL/dev/arm/gic_v3_cpu_interface.cc -> .o
 [     CXX] ALL/arch/arm/faults.cc -> .o
 [     CXX] ALL/arch/arm/insts/vfp.cc -> .o
 [     CXX] ALL/arch/arm/regs/misc.cc -> .o
 [     CXX] ALL/arch/arm/tracers/tarmac_record.cc -> .o
 [     CXX] ALL/arch/arm/insts/misc.cc -> .o
 [     CXX] ALL/arch/arm/generated/inst-constrs-2.cc -> .o
 [     CXX] ALL/arch/arm/insts/tme64.cc -> .o
 [     CXX] ALL/arch/arm/insts/branch64.cc -> .o
 [     CXX] ALL/arch/arm/tracers/tarmac_parser.cc -> .o
 [     CXX] ALL/arch/arm/tlbi_op.cc -> .o
 [     CXX] ALL/arch/arm/insts/pseudo.cc -> .o
 [SO Param] m5.objects.GenericTimer, GenericTimer -> 
ALL/python/_m5/param_GenericTimer.cc
 [     CXX] ALL/python/_m5/param_GenericTimer.cc -> .o
 [SO Param] m5.objects.PciDevice, PciMemUpperBar -> ALL/params/PciMemUpperBar.hh
 [     CXX] ALL/python/_m5/param_EtherDevBase.cc -> .o
 [     CXX] ALL/dev/pci/device.cc -> .o
 [     CXX] ALL/python/_m5/param_IdeController.cc -> .o
 [     CXX] ALL/dev/virtio/pci.cc -> .o
 [     CXX] ALL/dev/storage/ide_disk.cc -> .o
 [     CXX] ALL/python/_m5/param_PciBar.cc -> .o
 [     CXX] ALL/python/_m5/param_X86IdeController.cc -> .o
 [     CXX] ALL/dev/net/etherdevice.cc -> .o
 [     CXX] ALL/python/_m5/param_PciLegacyIoBar.cc -> .o
 [     CXX] ALL/python/_m5/param_IdeDisk.cc -> .o
 [     CXX] ALL/python/_m5/param_IGbE.cc -> .o
 [     CXX] ALL/python/_m5/param_PciDevice.cc -> .o
 [     CXX] ALL/dev/pci/copy_engine.cc -> .o
 [     CXX] ALL/python/_m5/param_Sinic.cc -> .o
 [     CXX] ALL/dev/storage/ide_ctrl.cc -> .o
{standard input}: Assembler messages:
{standard input}:13761607: Warning: end of file not at end of a line; newline 
inserted
{standard input}:13762180: Error: unknown pseudo-op: `.llst3323'
g++: fatal error: Killed signal terminated program cc1plus
compilation terminated.
scons: *** [build/ALL/arch/x86/generated/inst-constrs.o] Error 1
Traceback (most recent call last):
  File "/nobackup/jenkins/workspace/nightly/tests/./main.py", line 25, in 
<module>
 [     CXX] ALL/python/_m5/param_PciIoBar.cc -> .o
 [     CXX] ALL/dev/pci/host.cc -> .o
 [     CXX] ALL/python/_m5/param_EtherDevice.cc -> .o
 [     CXX] ALL/python/_m5/param_PciMemUpperBar.cc -> .o
 [     CXX] ALL/python/_m5/param_CopyEngine.cc -> .o
 [     CXX] ALL/dev/net/i8254xGBe.cc -> .o
 [     CXX] ALL/python/_m5/param_NSGigE.cc -> .o
 [     CXX] ALL/python/_m5/param_PciBarNone.cc -> .o
 [     CXX] ALL/dev/x86/ide_ctrl.cc -> .o
 [     CXX] ALL/python/_m5/param_PciMemBar.cc -> .o
 [     CXX] ALL/python/_m5/param_PciVirtIO.cc -> .o
 [SO Param] m5.objects.Sequencer, DMASequencer -> 
ALL/python/_m5/param_DMASequencer.cc
 [SO Param] m5.objects.GarnetLink, NetworkBridge -> 
ALL/python/_m5/param_NetworkBridge.cc
 [SO Param] m5.objects.AbstractMemory, AbstractMemory -> 
ALL/python/_m5/param_AbstractMemory.cc
 [SO Param] m5.objects.IntelMP, X86IntelMPLocalIntAssignment -> 
ALL/params/X86IntelMPLocalIntAssignment.hh
 [SO Param] m5.objects.TimingExpr, TimingExpr -> 
ALL/python/_m5/param_TimingExpr.cc
 [SO Param] m5.objects.BranchPredictor, TAGE_SC_L_64KB -> 
ALL/params/TAGE_SC_L_64KB.hh
 [SO Param] m5.objects.Directory_Controller, Directory_Controller -> 
ALL/params/Directory_Controller.hh
 [SO Param] m5.objects.BaseMinorCPU, MinorOpClass -> 
ALL/python/_m5/param_MinorOpClass.cc
 [SO Param] m5.objects.RealView, AmbaDmaDevice -> 
ALL/python/_m5/param_AmbaDmaDevice.cc
 [SO Param] m5.objects.Workload, KernelWorkload -> ALL/params/KernelWorkload.hh
 [SO Param] m5.objects.SMBios, X86SMBiosSMBiosStructure -> 
ALL/params/X86SMBiosSMBiosStructure.hh
 [SO Param] m5.objects.ReplacementPolicies, BIPRP -> ALL/params/BIPRP.hh
 [     CXX] ALL/python/_m5/param_AmbaDmaDevice.cc -> .o
 [     CXX] ALL/python/_m5/param_X86FsLinux.cc -> .o
 [     CXX] ALL/python/_m5/param_ArmFsWorkload.cc -> .o
 [     CXX] ALL/arch/x86/fs_workload.cc -> .o
 [     CXX] ALL/sim/debug.cc -> .o
 [     CXX] ALL/arch/x86/process.cc -> .o
 [     CXX] ALL/python/_m5/param_KernelWorkload.cc -> .o
 [     CXX] ALL/sim/kernel_workload.cc -> .o
 [     CXX] ALL/arch/arm/freebsd/fs_workload.cc -> .o
 [     CXX] ALL/python/_m5/param_X86FsWorkload.cc -> .o
 [     CXX] ALL/arch/arm/linux/fs_workload.cc -> .o
 [     CXX] ALL/python/_m5/param_ArmFsFreebsd.cc -> .o
 [     CXX] ALL/arch/arm/fs_workload.cc -> .o
 [     CXX] ALL/arch/x86/linux/fs_workload.cc -> .o
 [     CXX] ALL/arch/riscv/linux/fs_workload.cc -> .o
 [     CXX] ALL/arch/arm/system.cc -> .o
 [     CXX] ALL/python/_m5/param_RiscvLinux.cc -> .o
 [SO Param] m5.objects.ReplacementPolicies, SHiPMemRP -> 
ALL/python/_m5/param_SHiPMemRP.cc
 [ENUM STR] m5.objects.ArmSystem, ArmExtension -> ALL/enums/ArmExtension.cc
 [SO Param] m5.objects.InstTracer, InstTracer -> 
ALL/python/_m5/param_InstTracer.cc
 [SO Param] m5.objects.BaseO3CPU, BaseO3CPU -> ALL/python/_m5/param_BaseO3CPU.cc
 [SO Param] m5.objects.QemuFwCfg, QemuFwCfgItemBytes -> 
ALL/python/_m5/param_QemuFwCfgItemBytes.cc
 [SO Param] m5.objects.SimpleMemory, SimpleMemory -> ALL/params/SimpleMemory.hh
 [     CXX] ALL/python/_m5/param_BaseO3CPU.cc -> .o
 [     CXX] ALL/python/_m5/param_QemuFwCfgItemBytes.cc -> .o
 [     CXX] ALL/python/_m5/param_GarnetNetwork.cc -> .o
{standard input}: Assembler messages:
{standard input}:13761607: Warning: end of file not at end of a line; newline 
inserted
{standard input}:13762180: Error: unknown pseudo-op: `.llst3323'
 [     CXX] ALL/python/_m5/param_RubyWireBuffer.cc -> .o
 [     CXX] ALL/mem/ruby/profiler/Profiler.cc -> .o
 [     CXX] ALL/mem/ruby/network/simple/SimpleNetwork.cc -> .o
 [     CXX] ALL/mem/ruby/protocol/RequestMsg.cc -> .o
 [     CXX] ALL/mem/ruby/network/garnet/CrossbarSwitch.cc -> .o
 [     CXX] ALL/mem/ruby/structures/CacheMemory.cc -> .o
 [     CXX] ALL/mem/ruby/system/CacheRecorder.cc -> .o
 [     CXX] ALL/mem/ruby/protocol/L2Cache_TBE.cc -> .o
 [     CXX] ALL/mem/ruby/profiler/AddressProfiler.cc -> .o
 [     CXX] ALL/mem/ruby/network/simple/SimpleLink.cc -> .o
 [     CXX] ALL/mem/ruby/network/garnet/SwitchAllocator.cc -> .o
 [     CXX] ALL/python/_m5/param_DMASequencer.cc -> .o
 [     CXX] ALL/mem/ruby/network/BasicLink.cc -> .o
 [     CXX] ALL/python/_m5/param_RubyPrefetcher.cc -> .o
 [     CXX] ALL/mem/ruby/network/simple/PerfectSwitch.cc -> .o
 [     CXX] ALL/mem/ruby/slicc_interface/AbstractController.cc -> .o
 [     CXX] ALL/mem/ruby/network/garnet/RoutingUnit.cc -> .o
 [     CXX] ALL/python/_m5/param_RubyHTMSequencer.cc -> .o
 [     CXX] ALL/python/_m5/param_GarnetExtLink.cc -> .o
 [     CXX] ALL/mem/ruby/common/WriteMask.cc -> .o
 [     CXX] ALL/python/_m5/param_Switch.cc -> .o
 [     CXX] ALL/python/_m5/param_RubyController.cc -> .o
 [     CXX] ALL/mem/ruby/network/garnet/Router.cc -> .o
 [MAKE INC] ALL/mem/ruby/system/DMASequencer.hh -> protocol/DMASequencer.hh
 [     CXX] ALL/mem/ruby/protocol/L2Cache_Entry.cc -> .o
 [     CXX] ALL/python/_m5/param_GarnetIntLink.cc -> .o
 [     CXX] ALL/python/_m5/param_WeightBased.cc -> .o
 [     CXX] ALL/mem/ruby/protocol/MemoryMsg.cc -> .o
 [     CXX] ALL/mem/ruby/network/garnet/OutputUnit.cc -> .o
 [     CXX] ALL/python/_m5/param_NetworkBridge.cc -> .o
 [     CXX] ALL/python/_m5/param_BaseRoutingUnit.cc -> .o
 [     CXX] ALL/mem/ruby/network/garnet/OutVcState.cc -> .o
 [MAKE INC] ALL/mem/ruby/structures/CacheMemory.hh -> protocol/CacheMemory.hh
 [MAKE INC] ALL/mem/ruby/structures/RubyPrefetcher.hh -> 
protocol/RubyPrefetcher.hh
 [     CXX] ALL/python/_m5/param_RubyCache.cc -> .o
 [     CXX] ALL/python/_m5/param_SimpleNetwork.cc -> .o
 [MAKE INC] ALL/mem/ruby/system/HTMSequencer.hh -> protocol/HTMSequencer.hh
 [     CXX] ALL/mem/ruby/protocol/Directory_Entry.cc -> .o
 [MAKE INC] ALL/mem/ruby/structures/WireBuffer.hh -> protocol/WireBuffer.hh
 [     CXX] ALL/mem/ruby/network/garnet/NetworkInterface.cc -> .o
 [     CXX] ALL/mem/ruby/system/Sequencer.cc -> .o
 [     CXX] ALL/mem/ruby/common/DataBlock.cc -> .o
g++: fatal error: Killed signal terminated program cc1plus
compilation terminated.
scons: *** [build/ALL/arch/x86/generated/inst-constrs.o] Error 1
scons: building terminated because of errors.
Traceback (most recent call last):
  File "/nobackup/jenkins/workspace/nightly/tests/../ext/testlib/runner.py", 
line 205, in setup
    fixture.setup(testitem)
  File "/nobackup/jenkins/workspace/nightly/tests/gem5/fixture.py", line 133, 
in setup
    self._setup(testitem)
  File "/nobackup/jenkins/workspace/nightly/tests/gem5/fixture.py", line 184, 
in _setup
    log_call(log.test_log, command, time=None, stderr=sys.stderr)
  File "/nobackup/jenkins/workspace/nightly/tests/../ext/testlib/helper.py", 
line 198, in log_call
    raise subprocess.CalledProcessError(retval, cmdstr)
subprocess.CalledProcessError: Command 'scons -C 
/nobackup/jenkins/workspace/nightly -j 24 --ignore-style --no-compress-debug 
/nobackup/jenkins/workspace/nightly/build/ALL/gem5.opt' returned non-zero exit 
status 2.

Exception raised while setting up fixture for Test Library
=============================== No testing done ================================
    sys.exit(testlib())
  File "/nobackup/jenkins/workspace/nightly/tests/../ext/testlib/main.py", line 
331, in main
    result = globals()['do_'+configuration.config.command]()
  File "/nobackup/jenkins/workspace/nightly/tests/../ext/testlib/main.py", line 
303, in do_run
    return run_schedule(test_schedule, log_handler)
  File "/nobackup/jenkins/workspace/nightly/tests/../ext/testlib/main.py", line 
277, in run_schedule
    log_handler.finish_testing()
  File "/nobackup/jenkins/workspace/nightly/tests/../ext/testlib/main.py", line 
68, in finish_testing
    self.result_handler.close()
  File "/nobackup/jenkins/workspace/nightly/tests/../ext/testlib/handlers.py", 
line 164, in close
    self._save()
  File "/nobackup/jenkins/workspace/nightly/tests/../ext/testlib/handlers.py", 
line 156, in _save
    result.JUnitSavedResults.save(
  File "/nobackup/jenkins/workspace/nightly/tests/../ext/testlib/result.py", 
line 330, in save
    results = JUnitTestSuites(results)
  File "/nobackup/jenkins/workspace/nightly/tests/../ext/testlib/result.py", 
line 233, in __init__
    self.attributes.append(self.result_attribute(result,
  File "/nobackup/jenkins/workspace/nightly/tests/../ext/testlib/result.py", 
line 241, in result_attribute
    return XMLAttribute(self.result_map[result], count)
KeyError: 0
Build step 'Execute shell' marked build as failure
Archiving artifacts
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