Richard Cooper has uploaded this change for review. (
https://gem5-review.googlesource.com/c/public/gem5/+/69683?usp=email )
Change subject: arch-arm: Add an option to use 64-bit PMU counters
......................................................................
arch-arm: Add an option to use 64-bit PMU counters
Add support for 64-bit PMU counter registers (PMEVCNTR<n>_EL0), as
specified in Armv8-A.
The counter registers are 32-bit by default, but 64-bit counters can
be chosen using the `ArmPMU.use64bitCounters` parameter.
Change-Id: Idb838a7438c7711438a7e078278bed21710049af
---
M src/arch/arm/ArmPMU.py
M src/arch/arm/pmu.cc
M src/arch/arm/pmu.hh
3 files changed, 16 insertions(+), 7 deletions(-)
diff --git a/src/arch/arm/ArmPMU.py b/src/arch/arm/ArmPMU.py
index f21aaff..61afe29 100644
--- a/src/arch/arm/ArmPMU.py
+++ b/src/arch/arm/ArmPMU.py
@@ -1,5 +1,5 @@
# -*- mode:python -*-
-# Copyright (c) 2009-2014, 2017, 2020 ARM Limited
+# Copyright (c) 2009-2014, 2017, 2020, 2022 Arm Limited
# All rights reserved.
#
# The license below extends only to copyright in the software and shall
@@ -215,3 +215,5 @@
platform = Param.Platform(Parent.any, "Platform this device is part
of.")
eventCounters = Param.Int(31, "Number of supported PMU counters")
interrupt = Param.ArmInterruptPin("PMU interrupt")
+ use64bitCounters = Param.Bool(False, "Choose whether to use 64-bit or "
+ "32-bit PMEVCNTR<n>_EL0 registers.")
diff --git a/src/arch/arm/pmu.cc b/src/arch/arm/pmu.cc
index f0ab978..89dc2c8 100644
--- a/src/arch/arm/pmu.cc
+++ b/src/arch/arm/pmu.cc
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2011-2014, 2017-2019 ARM Limited
+ * Copyright (c) 2011-2014, 2017-2019, 2022 Arm Limited
* All rights reserved
*
* The license below extends only to copyright in the software and shall
@@ -56,12 +56,13 @@
PMU::PMU(const ArmPMUParams &p)
: SimObject(p), BaseISADevice(),
+ use64bitCounters(p.use64bitCounters),
reg_pmcnten(0), reg_pmcr(0),
reg_pmselr(0), reg_pminten(0), reg_pmovsr(0),
reg_pmceid0(0),reg_pmceid1(0),
clock_remainder(0),
maximumCounterCount(p.eventCounters),
- cycleCounter(*this, maximumCounterCount),
+ cycleCounter(*this, maximumCounterCount, p.use64bitCounters),
cycleCounterEventId(p.cycleEventId),
swIncrementEvent(nullptr),
reg_pmcr_conf(0),
@@ -175,7 +176,7 @@
// at this stage all probe configurations are done
// counters can be configured
for (uint32_t index = 0; index < maximumCounterCount-1; index++) {
- counters.emplace_back(*this, index);
+ counters.emplace_back(*this, index, use64bitCounters);
}
std::shared_ptr<PMUEvent> event = getEvent(cycleCounterEventId);
@@ -685,6 +686,7 @@
{
DPRINTF(Checkpoint, "Serializing Arm PMU\n");
+ SERIALIZE_SCALAR(use64bitCounters);
SERIALIZE_SCALAR(reg_pmcr);
SERIALIZE_SCALAR(reg_pmcnten);
SERIALIZE_SCALAR(reg_pmselr);
@@ -705,6 +707,7 @@
{
DPRINTF(Checkpoint, "Unserializing Arm PMU\n");
+ UNSERIALIZE_SCALAR(use64bitCounters);
UNSERIALIZE_SCALAR(reg_pmcr);
UNSERIALIZE_SCALAR(reg_pmcnten);
UNSERIALIZE_SCALAR(reg_pmselr);
diff --git a/src/arch/arm/pmu.hh b/src/arch/arm/pmu.hh
index 46b10d0..ec60c6b 100644
--- a/src/arch/arm/pmu.hh
+++ b/src/arch/arm/pmu.hh
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2011-2014, 2017-2018 ARM Limited
+ * Copyright (c) 2011-2014, 2017-2018, 2022 Arm Limited
* All rights reserved
*
* The license below extends only to copyright in the software and shall
@@ -413,9 +413,10 @@
/** State of a counter within the PMU. **/
struct CounterState : public Serializable
{
- CounterState(PMU &pmuReference, uint64_t counter_id)
+ CounterState(PMU &pmuReference, uint64_t counter_id,
+ const bool is_64_bit)
: eventId(0), filter(0), enabled(false),
- overflow64(false), sourceEvent(nullptr),
+ overflow64(is_64_bit), sourceEvent(nullptr),
counterId(counter_id), value(0), resetValue(false),
pmu(pmuReference) {}
@@ -572,6 +573,9 @@
void updateAllCounters();
protected: /* State that needs to be serialized */
+ /** Determine whether to use 64-bit or 32-bit counters. */
+ bool use64bitCounters;
+
/** Performance Monitor Count Enable Register */
RegVal reg_pmcnten;
--
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Gerrit-Project: public/gem5
Gerrit-Branch: develop
Gerrit-Change-Id: Idb838a7438c7711438a7e078278bed21710049af
Gerrit-Change-Number: 69683
Gerrit-PatchSet: 1
Gerrit-Owner: Richard Cooper <richard.coo...@arm.com>
Gerrit-MessageType: newchange
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