Matthew Poremba has submitted this change. ( https://gem5-review.googlesource.com/c/public/gem5/+/70042?usp=email )

 (

1 is the latest approved patch-set.
No files were changed between the latest approved patch-set and the submitted one.
 )Change subject: arch-vega: Add decodings for new MI100 VOP2 insts
......................................................................

arch-vega: Add decodings for new MI100 VOP2 insts

VOP2 with opcodes 55-61 were added in MI100 and are not in Vega10. This
changeset adds the decodings for these instructions.

The changeset does not implement the instructions, however the fatal
message is much more helpful for debugging compared so a generic
decode_invalid handler.

Change-Id: Ibde0880c35ff915bf8e50772df9ce263e55ca893
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/70042
Maintainer: Matt Sinclair <mattdsincl...@gmail.com>
Tested-by: kokoro <noreply+kok...@google.com>
Reviewed-by: Matt Sinclair <mattdsincl...@gmail.com>
---
M src/arch/amdgpu/vega/decoder.cc
M src/arch/amdgpu/vega/gpu_decoder.hh
2 files changed, 84 insertions(+), 28 deletions(-)

Approvals:
  Matt Sinclair: Looks good to me, approved; Looks good to me, approved
  kokoro: Regressions pass




diff --git a/src/arch/amdgpu/vega/decoder.cc b/src/arch/amdgpu/vega/decoder.cc
index 291dd69..fd3a803 100644
--- a/src/arch/amdgpu/vega/decoder.cc
+++ b/src/arch/amdgpu/vega/decoder.cc
@@ -274,34 +274,34 @@
         &Decoder::decode_OP_VOP2__V_SUBREV_U32,
         &Decoder::decode_OP_VOP2__V_SUBREV_U32,
         &Decoder::decode_OP_VOP2__V_SUBREV_U32,
-        &Decoder::decode_invalid,
-        &Decoder::decode_invalid,
-        &Decoder::decode_invalid,
-        &Decoder::decode_invalid,
-        &Decoder::decode_invalid,
-        &Decoder::decode_invalid,
-        &Decoder::decode_invalid,
-        &Decoder::decode_invalid,
-        &Decoder::decode_invalid,
-        &Decoder::decode_invalid,
-        &Decoder::decode_invalid,
-        &Decoder::decode_invalid,
-        &Decoder::decode_invalid,
-        &Decoder::decode_invalid,
-        &Decoder::decode_invalid,
-        &Decoder::decode_invalid,
-        &Decoder::decode_invalid,
-        &Decoder::decode_invalid,
-        &Decoder::decode_invalid,
-        &Decoder::decode_invalid,
-        &Decoder::decode_invalid,
-        &Decoder::decode_invalid,
-        &Decoder::decode_invalid,
-        &Decoder::decode_invalid,
-        &Decoder::decode_invalid,
-        &Decoder::decode_invalid,
-        &Decoder::decode_invalid,
-        &Decoder::decode_invalid,
+        &Decoder::decode_OP_VOP2__V_DOT2C_F32_F16,
+        &Decoder::decode_OP_VOP2__V_DOT2C_F32_F16,
+        &Decoder::decode_OP_VOP2__V_DOT2C_F32_F16,
+        &Decoder::decode_OP_VOP2__V_DOT2C_F32_F16,
+        &Decoder::decode_OP_VOP2__V_DOT2C_I32_I16,
+        &Decoder::decode_OP_VOP2__V_DOT2C_I32_I16,
+        &Decoder::decode_OP_VOP2__V_DOT2C_I32_I16,
+        &Decoder::decode_OP_VOP2__V_DOT2C_I32_I16,
+        &Decoder::decode_OP_VOP2__V_DOT4C_I32_I8,
+        &Decoder::decode_OP_VOP2__V_DOT4C_I32_I8,
+        &Decoder::decode_OP_VOP2__V_DOT4C_I32_I8,
+        &Decoder::decode_OP_VOP2__V_DOT4C_I32_I8,
+        &Decoder::decode_OP_VOP2__V_DOT8C_I32_I4,
+        &Decoder::decode_OP_VOP2__V_DOT8C_I32_I4,
+        &Decoder::decode_OP_VOP2__V_DOT8C_I32_I4,
+        &Decoder::decode_OP_VOP2__V_DOT8C_I32_I4,
+        &Decoder::decode_OP_VOP2__V_FMAC_F32,
+        &Decoder::decode_OP_VOP2__V_FMAC_F32,
+        &Decoder::decode_OP_VOP2__V_FMAC_F32,
+        &Decoder::decode_OP_VOP2__V_FMAC_F32,
+        &Decoder::decode_OP_VOP2__V_PK_FMAC_F16,
+        &Decoder::decode_OP_VOP2__V_PK_FMAC_F16,
+        &Decoder::decode_OP_VOP2__V_PK_FMAC_F16,
+        &Decoder::decode_OP_VOP2__V_PK_FMAC_F16,
+        &Decoder::decode_OP_VOP2__V_XNOR_B32,
+        &Decoder::decode_OP_VOP2__V_XNOR_B32,
+        &Decoder::decode_OP_VOP2__V_XNOR_B32,
+        &Decoder::decode_OP_VOP2__V_XNOR_B32,
         &Decoder::subDecode_OP_VOPC,
         &Decoder::subDecode_OP_VOPC,
         &Decoder::subDecode_OP_VOPC,
@@ -4172,6 +4172,55 @@
     }

     GPUStaticInst*
+    Decoder::decode_OP_VOP2__V_DOT2C_F32_F16(MachInst iFmt)
+    {
+        fatal("Trying to decode instruction without a class\n");
+        return nullptr;
+    }
+
+    GPUStaticInst*
+    Decoder::decode_OP_VOP2__V_DOT2C_I32_I16(MachInst iFmt)
+    {
+        fatal("Trying to decode instruction without a class\n");
+        return nullptr;
+    }
+
+    GPUStaticInst*
+    Decoder::decode_OP_VOP2__V_DOT4C_I32_I8(MachInst iFmt)
+    {
+        fatal("Trying to decode instruction without a class\n");
+        return nullptr;
+    }
+
+    GPUStaticInst*
+    Decoder::decode_OP_VOP2__V_DOT8C_I32_I4(MachInst iFmt)
+    {
+        fatal("Trying to decode instruction without a class\n");
+        return nullptr;
+    }
+
+    GPUStaticInst*
+    Decoder::decode_OP_VOP2__V_FMAC_F32(MachInst iFmt)
+    {
+        fatal("Trying to decode instruction without a class\n");
+        return nullptr;
+    }
+
+    GPUStaticInst*
+    Decoder::decode_OP_VOP2__V_PK_FMAC_F16(MachInst iFmt)
+    {
+        fatal("Trying to decode instruction without a class\n");
+        return nullptr;
+    }
+
+    GPUStaticInst*
+    Decoder::decode_OP_VOP2__V_XNOR_B32(MachInst iFmt)
+    {
+        fatal("Trying to decode instruction without a class\n");
+        return nullptr;
+    }
+
+    GPUStaticInst*
     Decoder::decode_OP_SOP2__S_ADD_U32(MachInst iFmt)
     {
         return new Inst_SOP2__S_ADD_U32(&iFmt->iFmt_SOP2);
diff --git a/src/arch/amdgpu/vega/gpu_decoder.hh b/src/arch/amdgpu/vega/gpu_decoder.hh
index 1be4386..af989e0 100644
--- a/src/arch/amdgpu/vega/gpu_decoder.hh
+++ b/src/arch/amdgpu/vega/gpu_decoder.hh
@@ -1358,6 +1358,13 @@
         GPUStaticInst* decode_OP_VOP2__V_ADD_U32(MachInst);
         GPUStaticInst* decode_OP_VOP2__V_SUB_U32(MachInst);
         GPUStaticInst* decode_OP_VOP2__V_SUBREV_U32(MachInst);
+        GPUStaticInst* decode_OP_VOP2__V_DOT2C_F32_F16(MachInst);
+        GPUStaticInst* decode_OP_VOP2__V_DOT2C_I32_I16(MachInst);
+        GPUStaticInst* decode_OP_VOP2__V_DOT4C_I32_I8(MachInst);
+        GPUStaticInst* decode_OP_VOP2__V_DOT8C_I32_I4(MachInst);
+        GPUStaticInst* decode_OP_VOP2__V_FMAC_F32(MachInst);
+        GPUStaticInst* decode_OP_VOP2__V_PK_FMAC_F16(MachInst);
+        GPUStaticInst* decode_OP_VOP2__V_XNOR_B32(MachInst);
         GPUStaticInst* decode_OP_VOPC__V_CMP_CLASS_F32(MachInst);
         GPUStaticInst* decode_OP_VOPC__V_CMPX_CLASS_F32(MachInst);
         GPUStaticInst* decode_OP_VOPC__V_CMP_CLASS_F64(MachInst);

--
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Gerrit-MessageType: merged
Gerrit-Project: public/gem5
Gerrit-Branch: develop
Gerrit-Change-Id: Ibde0880c35ff915bf8e50772df9ce263e55ca893
Gerrit-Change-Number: 70042
Gerrit-PatchSet: 4
Gerrit-Owner: Matthew Poremba <matthew.pore...@amd.com>
Gerrit-Reviewer: Matt Sinclair <mattdsincl...@gmail.com>
Gerrit-Reviewer: Matthew Poremba <matthew.pore...@amd.com>
Gerrit-Reviewer: kokoro <noreply+kok...@google.com>
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