Bobby Bruce has submitted this change. (
https://gem5-review.googlesource.com/c/public/gem5/+/69102?usp=email )
Change subject: cpu-o3: Copy general O3 fetch stats to
BaseCPU::FetchCPUStats
......................................................................
cpu-o3: Copy general O3 fetch stats to BaseCPU::FetchCPUStats
The stats moved are from fetch.hh and fetch.cc of O3. Stat branches is
now tracked by numBranches. Stat branchRate is now tracked by
branchRate in FetchCPUStats. Stat rate is tracked by fetchRate. Stat
insts is tracked by numInsts. Stat icacheStallCycles is tracked by
icacheStallCycles in BaseCPU::FetchCPUStats.
Change-Id: I2a0a48a175bcb4322c66490f16c906dc9597f30e
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/69102
Tested-by: kokoro <noreply+kok...@google.com>
Maintainer: Bobby Bruce <bbr...@ucdavis.edu>
Reviewed-by: Bobby Bruce <bbr...@ucdavis.edu>
---
M src/cpu/base.cc
M src/cpu/base.hh
M src/cpu/o3/commit.cc
M src/cpu/o3/fetch.cc
4 files changed, 47 insertions(+), 2 deletions(-)
Approvals:
kokoro: Regressions pass
Bobby Bruce: Looks good to me, approved; Looks good to me, approved
diff --git a/src/cpu/base.cc b/src/cpu/base.cc
index 801a95b..7c19307 100644
--- a/src/cpu/base.cc
+++ b/src/cpu/base.cc
@@ -196,7 +196,13 @@
executeStats.reserve(numThreads);
commitStats.reserve(numThreads);
for (int i = 0; i < numThreads; i++) {
- fetchStats.emplace_back(new FetchCPUStats(this, i));
+ // create fetchStat object for thread i and set rate formulas
+ FetchCPUStats* fetchStatptr = new FetchCPUStats(this, i);
+ fetchStatptr->fetchRate = fetchStatptr->numInsts /
baseStats.numCycles;
+ fetchStatptr->branchRate = fetchStatptr->numBranches /
+ baseStats.numCycles;
+ fetchStats.emplace_back(fetchStatptr);
+
executeStats.emplace_back(new ExecuteCPUStats(this, i));
// create commitStat object for thread i and set ipc, cpi formulas
CommitCPUStats* commitStatptr = new CommitCPUStats(this, i);
@@ -862,15 +868,31 @@
"Number of instructions fetched (thread level)"),
ADD_STAT(numOps, statistics::units::Count::get(),
"Number of ops (including micro ops) fetched (thread level)"),
+ ADD_STAT(fetchRate, statistics::units::Rate<
+ statistics::units::Count, statistics::units::Cycle>::get(),
+ "Number of inst fetches per cycle"),
ADD_STAT(numBranches, statistics::units::Count::get(),
"Number of branches fetched"),
+ ADD_STAT(branchRate, statistics::units::Ratio::get(),
+ "Number of branch fetches per cycle"),
+ ADD_STAT(icacheStallCycles, statistics::units::Cycle::get(),
+ "ICache total stall cycles"),
ADD_STAT(numFetchSuspends, statistics::units::Count::get(),
"Number of times Execute suspended instruction fetching")
{
+ fetchRate
+ .flags(statistics::total);
+
numBranches
.prereq(numBranches);
+ branchRate
+ .flags(statistics::total);
+
+ icacheStallCycles
+ .prereq(icacheStallCycles);
+
}
// means it is incremented in a vector indexing and not directly
@@ -981,6 +1003,9 @@
ADD_STAT(committedControl, statistics::units::Count::get(),
"Class of control type instructions committed")
{
+ numInsts
+ .prereq(numInsts);
+
cpi.precision(6);
ipc.precision(6);
diff --git a/src/cpu/base.hh b/src/cpu/base.hh
index f173967..946ea6b 100644
--- a/src/cpu/base.hh
+++ b/src/cpu/base.hh
@@ -696,9 +696,18 @@
/* Total number of operations fetched */
statistics::Scalar numOps;
+ /* Number of instruction fetched per cycle. */
+ statistics::Formula fetchRate;
+
/* Total number of branches fetched */
statistics::Scalar numBranches;
+ /* Number of branch fetches per cycle. */
+ statistics::Formula branchRate;
+
+ /* Number of cycles stalled due to an icache miss */
+ statistics::Scalar icacheStallCycles;
+
/* Number of times fetch was asked to suspend by Execute */
statistics::Scalar numFetchSuspends;
diff --git a/src/cpu/o3/commit.cc b/src/cpu/o3/commit.cc
index 63bf7ae..82ecc01 100644
--- a/src/cpu/o3/commit.cc
+++ b/src/cpu/o3/commit.cc
@@ -1019,6 +1019,8 @@
if (commit_success) {
++num_committed;
+ cpu->commitStats[tid]
+ ->committedInstType[head_inst->opClass()]++;
stats.committedInstType[tid][head_inst->opClass()]++;
ppCommit->notify(head_inst);
diff --git a/src/cpu/o3/fetch.cc b/src/cpu/o3/fetch.cc
index d3cdd2c..89d1b81 100644
--- a/src/cpu/o3/fetch.cc
+++ b/src/cpu/o3/fetch.cc
@@ -540,6 +540,8 @@
inst->setPredTarg(next_pc);
inst->setPredTaken(predict_taken);
+ // update both old and new stats
+ cpu->fetchStats[tid]->numBranches++;
++fetchStats.branches;
if (predict_taken) {
@@ -1145,8 +1147,11 @@
fetchCacheLine(fetchAddr, tid, this_pc.instAddr());
- if (fetchStatus[tid] == IcacheWaitResponse)
+ if (fetchStatus[tid] == IcacheWaitResponse) {
+ // update both old and new stats
++fetchStats.icacheStallCycles;
+ cpu->fetchStats[tid]->icacheStallCycles++;
+ }
else if (fetchStatus[tid] == ItlbWait)
++fetchStats.tlbCycles;
else
@@ -1242,7 +1247,9 @@
staticInst = dec_ptr->decode(this_pc);
// Increment stat of fetched instructions.
+ // Update both old and new stats
++fetchStats.insts;
+ cpu->fetchStats[tid]->numInsts++;
if (staticInst->isMacroop()) {
curMacroop = staticInst;
@@ -1572,6 +1579,8 @@
++fetchStats.squashCycles;
DPRINTF(Fetch, "[tid:%i] Fetch is squashing!\n", tid);
} else if (fetchStatus[tid] == IcacheWaitResponse) {
+ // update both old and new stats
+ cpu->fetchStats[tid]->icacheStallCycles++;
++fetchStats.icacheStallCycles;
DPRINTF(Fetch, "[tid:%i] Fetch is waiting cache response!\n",
tid);
--
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Gerrit-MessageType: merged
Gerrit-Project: public/gem5
Gerrit-Branch: develop
Gerrit-Change-Id: I2a0a48a175bcb4322c66490f16c906dc9597f30e
Gerrit-Change-Number: 69102
Gerrit-PatchSet: 9
Gerrit-Owner: Melissa Jost <melissakj...@gmail.com>
Gerrit-Reviewer: Bobby Bruce <bbr...@ucdavis.edu>
Gerrit-Reviewer: kokoro <noreply+kok...@google.com>
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