Bobby Bruce has submitted this change. (
https://gem5-review.googlesource.com/c/public/gem5/+/69099?usp=email )
Change subject: cpu: Move commit stats from simple to base cpu
......................................................................
cpu: Move commit stats from simple to base cpu
Created stat group CommitCPUStats in BaseCPU and copied stats from the
simple cpu model.
The stats copied from SimpleCPU are numCondCtrlInsts, numFpInsts,
numIntInsts, numLoadInsts, numStoreInsts, numVecInsts.
Copied committedControl of MinorCPU to BaseCPU::CommittedCPUStats. In
MinorCPU, this stat was a 2D vector, where the first dimension is the
thread ID. In base it is now a 1D vector that is tied to a thread ID
via the commitStats vector.
The committedControl stat vector in CommitCPUStats is updated in the
same way in all CPU models. The function updateComCtrlStats will
update committedControl and the CPU models will call this function
instead of updating committedControl directly. This function takes
a StaticInstPtr as input, which Simple, Minor, and O3 CPU models are
able to provide.
Duplicate stat "branches" in O3 commit with
BaseCPU::CommittedCPUStats::committedControl::IsControl.
O3 commit stats floating, integer, loads, memRefs, vectorInstructions
are duplicated by numFpInsts, numIntInsts, numLoadInsts, numMemRefs,
numVecInsts from BaseCPU::CommitCPUStats respectively. Implemented
numStoreInsts from BaseCPU::commitCPUStats for O3 commit stage.
Change-Id: Ie6f176623091159622d53e9899d780f235fce525
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/69099
Maintainer: Bobby Bruce <bbr...@ucdavis.edu>
Tested-by: kokoro <noreply+kok...@google.com>
Reviewed-by: Bobby Bruce <bbr...@ucdavis.edu>
---
M src/cpu/base.cc
M src/cpu/base.hh
M src/cpu/minor/execute.cc
M src/cpu/o3/commit.cc
M src/cpu/simple/base.cc
5 files changed, 137 insertions(+), 3 deletions(-)
Approvals:
kokoro: Regressions pass
Bobby Bruce: Looks good to me, approved; Looks good to me, approved
diff --git a/src/cpu/base.cc b/src/cpu/base.cc
index 641152e..5592bf0 100644
--- a/src/cpu/base.cc
+++ b/src/cpu/base.cc
@@ -194,9 +194,11 @@
// create a stat group object for each thread on this core
fetchStats.reserve(numThreads);
executeStats.reserve(numThreads);
+ commitStats.reserve(numThreads);
for (int i = 0; i < numThreads; i++) {
fetchStats.emplace_back(new FetchCPUStats(this, i));
executeStats.emplace_back(new ExecuteCPUStats(this, i));
+ commitStats.emplace_back(new CommitCPUStats(this, i));
}
}
@@ -922,4 +924,71 @@
.prereq(numVecRegWrites);
}
+BaseCPU::
+CommitCPUStats::CommitCPUStats(statistics::Group *parent, int thread_id)
+ : statistics::Group(parent, csprintf("commitStats%i",
thread_id).c_str()),
+ ADD_STAT(numMemRefs, statistics::units::Count::get(),
+ "Number of memory references committed"),
+ ADD_STAT(numFpInsts, statistics::units::Count::get(),
+ "Number of float instructions"),
+ ADD_STAT(numIntInsts, statistics::units::Count::get(),
+ "Number of integer instructions"),
+ ADD_STAT(numLoadInsts, statistics::units::Count::get(),
+ "Number of load instructions"),
+ ADD_STAT(numStoreInsts, statistics::units::Count::get(),
+ "Number of store instructions"),
+ ADD_STAT(numVecInsts, statistics::units::Count::get(),
+ "Number of vector instructions"),
+ ADD_STAT(committedInstType, statistics::units::Count::get(),
+ "Class of committed instruction."),
+ ADD_STAT(committedControl, statistics::units::Count::get(),
+ "Class of control type instructions committed")
+{
+ committedInstType
+ .init(enums::Num_OpClass)
+ .flags(statistics::total | statistics::pdf | statistics::dist);
+
+ for (unsigned i = 0; i < Num_OpClasses; ++i) {
+ committedInstType.subname(i, enums::OpClassStrings[i]);
+ }
+
+ committedControl
+ .init(StaticInstFlags::Flags::Num_Flags)
+ .flags(statistics::nozero);
+
+ for (unsigned i = 0; i < StaticInstFlags::Flags::Num_Flags; i++) {
+ committedControl.subname(i, StaticInstFlags::FlagsStrings[i]);
+ }
+}
+
+
+void
+BaseCPU::
+CommitCPUStats::updateComCtrlStats(const StaticInstPtr staticInst)
+{
+ /* Add a count for every control instruction type */
+ if (staticInst->isControl()) {
+ if (staticInst->isReturn()) {
+ committedControl[gem5::StaticInstFlags::Flags::IsReturn]++;
+ }
+ if (staticInst->isCall()) {
+ committedControl[gem5::StaticInstFlags::Flags::IsCall]++;
+ }
+ if (staticInst->isDirectCtrl()) {
+
committedControl[gem5::StaticInstFlags::Flags::IsDirectControl]++;
+ }
+ if (staticInst->isIndirectCtrl()) {
+ committedControl
+ [gem5::StaticInstFlags::Flags::IsIndirectControl]++;
+ }
+ if (staticInst->isCondCtrl()) {
+
committedControl[gem5::StaticInstFlags::Flags::IsCondControl]++;
+ }
+ if (staticInst->isUncondCtrl()) {
+
committedControl[gem5::StaticInstFlags::Flags::IsUncondControl]++;
+ }
+ committedControl[gem5::StaticInstFlags::Flags::IsControl]++;
+ }
+}
+
} // namespace gem5
diff --git a/src/cpu/base.hh b/src/cpu/base.hh
index acf78bb..934e56f 100644
--- a/src/cpu/base.hh
+++ b/src/cpu/base.hh
@@ -739,8 +739,40 @@
statistics::Scalar numDiscardedOps;
};
+ struct CommitCPUStats: public statistics::Group
+ {
+ CommitCPUStats(statistics::Group *parent, int thread_id);
+
+ /* Number of committed memory references. */
+ statistics::Scalar numMemRefs;
+
+ /* Number of float instructions */
+ statistics::Scalar numFpInsts;
+
+ /* Number of int instructions */
+ statistics::Scalar numIntInsts;
+
+ /* number of load instructions */
+ statistics::Scalar numLoadInsts;
+
+ /* Number of store instructions */
+ statistics::Scalar numStoreInsts;
+
+ /* Number of vector instructions */
+ statistics::Scalar numVecInsts;
+
+ /* Number of instructions committed by type (OpClass) */
+ statistics::Vector committedInstType;
+
+ /* number of control instructions committed by control inst type */
+ statistics::Vector committedControl;
+ void updateComCtrlStats(const StaticInstPtr staticInst);
+
+ };
+
std::vector<std::unique_ptr<FetchCPUStats>> fetchStats;
std::vector<std::unique_ptr<ExecuteCPUStats>> executeStats;
+ std::vector<std::unique_ptr<CommitCPUStats>> commitStats;
};
} // namespace gem5
diff --git a/src/cpu/minor/execute.cc b/src/cpu/minor/execute.cc
index 42c7b1a..99d12d6 100644
--- a/src/cpu/minor/execute.cc
+++ b/src/cpu/minor/execute.cc
@@ -879,6 +879,9 @@
thread->numOp++;
thread->threadStats.numOps++;
cpu.stats.numOps++;
+ // update both old and new stats
+ cpu.commitStats[inst->id.threadId]
+ ->committedInstType[inst->staticInst->opClass()]++;
cpu.stats.committedInstType[inst->id.threadId]
[inst->staticInst->opClass()]++;
diff --git a/src/cpu/o3/commit.cc b/src/cpu/o3/commit.cc
index 38dce83..b3da2d9 100644
--- a/src/cpu/o3/commit.cc
+++ b/src/cpu/o3/commit.cc
@@ -1396,6 +1396,8 @@
//
// Control Instructions
//
+ // update both old and new stats
+ cpu->commitStats[tid]->updateComCtrlStats(inst->staticInst);
if (inst->isControl())
stats.branches[tid]++;
@@ -1403,15 +1405,23 @@
// Memory references
//
if (inst->isMemRef()) {
+ // update both old and new stats
stats.memRefs[tid]++;
+ cpu->commitStats[tid]->numMemRefs++;
if (inst->isLoad()) {
+ // update both old and new stats
stats.loads[tid]++;
+ cpu->commitStats[tid]->numLoadInsts++;
}
if (inst->isAtomic()) {
stats.amos[tid]++;
}
+
+ if (inst->isStore()) {
+ cpu->commitStats[tid]->numStoreInsts++;
+ }
}
if (inst->isFullMemBarrier()) {
@@ -1419,15 +1429,24 @@
}
// Integer Instruction
- if (inst->isInteger())
+ if (inst->isInteger()) {
+ // update both old and new stats
+ cpu->commitStats[tid]->numIntInsts++;
stats.integer[tid]++;
+ }
// Floating Point Instruction
- if (inst->isFloating())
+ if (inst->isFloating()) {
+ // update both old and new stats
+ cpu->commitStats[tid]->numFpInsts++;
stats.floating[tid]++;
+ }
// Vector Instruction
- if (inst->isVector())
+ if (inst->isVector()) {
+ // update both old and new stats
+ cpu->commitStats[tid]->numVecInsts++;
stats.vectorInstructions[tid]++;
+ }
// Function Calls
if (inst->isCall())
diff --git a/src/cpu/simple/base.cc b/src/cpu/simple/base.cc
index d97e1a9..40f0fa7 100644
--- a/src/cpu/simple/base.cc
+++ b/src/cpu/simple/base.cc
@@ -408,6 +408,7 @@
if (curStaticInst->isInteger()){
// update both old and new stats
executeStats[t_info.thread->threadId()]->numIntAluAccesses++;
+ commitStats[t_info.thread->threadId()]->numIntInsts++;
t_info.execContextStats.numIntAluAccesses++;
t_info.execContextStats.numIntInsts++;
}
@@ -416,6 +417,7 @@
if (curStaticInst->isFloating()){
// update both old and new stats
executeStats[t_info.thread->threadId()]->numFpAluAccesses++;
+ commitStats[t_info.thread->threadId()]->numFpInsts++;
t_info.execContextStats.numFpAluAccesses++;
t_info.execContextStats.numFpInsts++;
}
@@ -424,6 +426,7 @@
if (curStaticInst->isVector()){
// update both old and new stats
executeStats[t_info.thread->threadId()]->numVecAluAccesses++;
+ commitStats[t_info.thread->threadId()]->numVecInsts++;
t_info.execContextStats.numVecAluAccesses++;
t_info.execContextStats.numVecInsts++;
}
@@ -446,14 +449,22 @@
//result bus acceses
if (curStaticInst->isLoad()){
+ // update both old and new stats
+ commitStats[t_info.thread->threadId()]->numLoadInsts++;
t_info.execContextStats.numLoadInsts++;
}
if (curStaticInst->isStore() || curStaticInst->isAtomic()){
+ // update both old and new stats
+ commitStats[t_info.thread->threadId()]->numStoreInsts++;
t_info.execContextStats.numStoreInsts++;
}
/* End power model statistics */
+ // update both old and new stats
+ commitStats[t_info.thread->threadId()]
+ ->committedInstType[curStaticInst->opClass()]++;
+
commitStats[t_info.thread->threadId()]->updateComCtrlStats(curStaticInst);
t_info.execContextStats.statExecutedInstType[curStaticInst->opClass()]++;
if (FullSystem)
--
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Gerrit-MessageType: merged
Gerrit-Project: public/gem5
Gerrit-Branch: develop
Gerrit-Change-Id: Ie6f176623091159622d53e9899d780f235fce525
Gerrit-Change-Number: 69099
Gerrit-PatchSet: 8
Gerrit-Owner: Melissa Jost <melissakj...@gmail.com>
Gerrit-Reviewer: Bobby Bruce <bbr...@ucdavis.edu>
Gerrit-Reviewer: Gabe Black <gabe.bl...@gmail.com>
Gerrit-Reviewer: Jason Lowe-Power <ja...@lowepower.com>
Gerrit-Reviewer: kokoro <noreply+kok...@google.com>
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