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Hello Richard Cooper,
I'd like you to do a code review.
Please visit
https://gem5-review.googlesource.com/c/public/gem5/+/70733?usp=email
to review the following change.
Change subject: arch-arm: Declare support for Armv8.2-I8MM.
......................................................................
arch-arm: Declare support for Armv8.2-I8MM.
Sets the appropriate bit in the ID_AA64ZFR0_EL1 sysreg that declares
support for ARMv8.2-I8MM.
This indicates that all pre-requisites for Armv8.2 SVE Int8 matrix
multiplication instructions have been met.
SMMLA, SUDOT, UMMLA, USMMLA, and USDOT instructions are implemented.
For more information please refer to the "ARM Architecture Reference
Manual Supplement - The Scalable Vector Extension (SVE), for ARMv8-A"
(https://developer.arm.com/architectures/cpu-architecture/a-profile/
docs/arm-architecture-reference-manual-supplement-armv8-a)
Change-Id: Id97e1c5de8c23a25336a6b323034e9eca8e598e4
Reviewed-by: Richard Cooper <richard.coo...@arm.com>
---
M src/arch/arm/ArmISA.py
M src/arch/arm/ArmSystem.py
M src/arch/arm/regs/misc.cc
3 files changed, 5 insertions(+), 0 deletions(-)
diff --git a/src/arch/arm/ArmISA.py b/src/arch/arm/ArmISA.py
index fbd93b6..ffe63eb 100644
--- a/src/arch/arm/ArmISA.py
+++ b/src/arch/arm/ArmISA.py
@@ -56,6 +56,7 @@
"FEAT_F32MM",
"FEAT_F64MM",
"FEAT_SVE",
+ "FEAT_I8MM",
# Armv8.3
"FEAT_FCMA",
"FEAT_JSCVT",
diff --git a/src/arch/arm/ArmSystem.py b/src/arch/arm/ArmSystem.py
index 5517632..9e66ee7 100644
--- a/src/arch/arm/ArmSystem.py
+++ b/src/arch/arm/ArmSystem.py
@@ -80,6 +80,7 @@
"FEAT_LPA", # Optional in Armv8.2
"FEAT_F32MM", # Optional in Armv8.2
"FEAT_F64MM", # Optional in Armv8.2
+ "FEAT_I8MM", # Optional in Armv8.2
# Armv8.3
"FEAT_FCMA",
"FEAT_JSCVT",
@@ -167,6 +168,7 @@
"FEAT_SVE",
"FEAT_F32MM",
"FEAT_F64MM",
+ "FEAT_I8MM",
# Armv8.3
"FEAT_FCMA",
"FEAT_JSCVT",
@@ -202,6 +204,7 @@
"FEAT_SVE",
"FEAT_F32MM",
"FEAT_F64MM",
+ "FEAT_I8MM",
]
diff --git a/src/arch/arm/regs/misc.cc b/src/arch/arm/regs/misc.cc
index 362f996..6b299aa 100644
--- a/src/arch/arm/regs/misc.cc
+++ b/src/arch/arm/regs/misc.cc
@@ -5406,6 +5406,7 @@
AA64ZFR0 zfr0_el1 = 0;
zfr0_el1.f32mm = release->has(ArmExtension::FEAT_F32MM) ? 1 :
0;
zfr0_el1.f64mm = release->has(ArmExtension::FEAT_F64MM) ? 1 :
0;
+ zfr0_el1.i8mm = release->has(ArmExtension::FEAT_I8MM) ? 1 : 0;
return zfr0_el1;
}())
.faultRead(EL0, faultIdst)
--
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Gerrit-MessageType: newchange
Gerrit-Project: public/gem5
Gerrit-Branch: develop
Gerrit-Change-Id: Id97e1c5de8c23a25336a6b323034e9eca8e598e4
Gerrit-Change-Number: 70733
Gerrit-PatchSet: 1
Gerrit-Owner: Giacomo Travaglini <giacomo.travagl...@arm.com>
Gerrit-Reviewer: Richard Cooper <richard.coo...@arm.com>
Gerrit-Attention: Richard Cooper <richard.coo...@arm.com>
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