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Hello Richard Cooper,

I'd like you to do a code review.
Please visit

    https://gem5-review.googlesource.com/c/public/gem5/+/70729?usp=email

to review the following change.


Change subject: arch-arm: Declare support for Armv8.2-F64MM.
......................................................................

arch-arm: Declare support for Armv8.2-F64MM.

Sets the appropriate bit in the ID_AA64ZFR0_EL1 sysreg that declares
support for ARMv8.2-F64MM.

This indicates that all pre-requisites for Armv8.2 SVE FP64
double-precision floating-point matrix multiplication instructions
have been met.

FMMLA, and LD1RO* instructions have been implemented, as well as the
128-bit element variants of TRN1, TRN2, UZP1, UZP2, ZIP1, and ZIP2.

For more information please refer to the "ARM Architecture Reference
Manual Supplement - The Scalable Vector Extension (SVE), for ARMv8-A"
(https://developer.arm.com/architectures/cpu-architecture/a-profile/
docs/arm-architecture-reference-manual-supplement-armv8-a)

Change-Id: Idac3a3ca590e6eb2beb217a40a8c10af1e917440
Reviewed-by: Richard Cooper <richard.coo...@arm.com>
---
M src/arch/arm/ArmISA.py
M src/arch/arm/ArmSystem.py
M src/arch/arm/regs/misc.cc
3 files changed, 5 insertions(+), 0 deletions(-)



diff --git a/src/arch/arm/ArmISA.py b/src/arch/arm/ArmISA.py
index 31ecbcb..fbd93b6 100644
--- a/src/arch/arm/ArmISA.py
+++ b/src/arch/arm/ArmISA.py
@@ -54,6 +54,7 @@
         "FEAT_RDM",
         # Armv8.2
         "FEAT_F32MM",
+        "FEAT_F64MM",
         "FEAT_SVE",
         # Armv8.3
         "FEAT_FCMA",
diff --git a/src/arch/arm/ArmSystem.py b/src/arch/arm/ArmSystem.py
index 06d1dcc..5517632 100644
--- a/src/arch/arm/ArmSystem.py
+++ b/src/arch/arm/ArmSystem.py
@@ -79,6 +79,7 @@
         "FEAT_LVA",  # Optional in Armv8.2
         "FEAT_LPA",  # Optional in Armv8.2
         "FEAT_F32MM", # Optional in Armv8.2
+        "FEAT_F64MM", # Optional in Armv8.2
         # Armv8.3
         "FEAT_FCMA",
         "FEAT_JSCVT",
@@ -165,6 +166,7 @@
         "FEAT_LPA",
         "FEAT_SVE",
         "FEAT_F32MM",
+        "FEAT_F64MM",
         # Armv8.3
         "FEAT_FCMA",
         "FEAT_JSCVT",
@@ -199,6 +201,7 @@
         "FEAT_LPA",
         "FEAT_SVE",
         "FEAT_F32MM",
+        "FEAT_F64MM",
     ]


diff --git a/src/arch/arm/regs/misc.cc b/src/arch/arm/regs/misc.cc
index 6cabfca..362f996 100644
--- a/src/arch/arm/regs/misc.cc
+++ b/src/arch/arm/regs/misc.cc
@@ -5405,6 +5405,7 @@
         .reset([this](){
             AA64ZFR0 zfr0_el1 = 0;
zfr0_el1.f32mm = release->has(ArmExtension::FEAT_F32MM) ? 1 : 0; + zfr0_el1.f64mm = release->has(ArmExtension::FEAT_F64MM) ? 1 : 0;
             return zfr0_el1;
         }())
         .faultRead(EL0, faultIdst)

--
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Gerrit-MessageType: newchange
Gerrit-Project: public/gem5
Gerrit-Branch: develop
Gerrit-Change-Id: Idac3a3ca590e6eb2beb217a40a8c10af1e917440
Gerrit-Change-Number: 70729
Gerrit-PatchSet: 1
Gerrit-Owner: Giacomo Travaglini <giacomo.travagl...@arm.com>
Gerrit-Reviewer: Richard Cooper <richard.coo...@arm.com>
Gerrit-Attention: Richard Cooper <richard.coo...@arm.com>
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