Roger Chang has uploaded this change for review. ( https://gem5-review.googlesource.com/c/public/gem5/+/71198?usp=email )

Change subject: arch-riscv: Check FPU status for c.flwsp c.fldsp c.fswsp c.fsdsp
......................................................................

arch-riscv: Check FPU status for c.flwsp c.fldsp c.fswsp c.fsdsp

Most of float point operations check the FPU status beforehead.
The change adds the missing FPU checking for these instructions.

Change-Id: I7f2ef89786af0d528f2029f1097cfeac6c7d65f2
---
M src/arch/riscv/isa/decoder.isa
1 file changed, 20 insertions(+), 0 deletions(-)



diff --git a/src/arch/riscv/isa/decoder.isa b/src/arch/riscv/isa/decoder.isa
index c7eefbc..2dcd118 100644
--- a/src/arch/riscv/isa/decoder.isa
+++ b/src/arch/riscv/isa/decoder.isa
@@ -307,6 +307,11 @@
                          CIMM1 << 5 |
                          CIMM5<2:0> << 6;
             }}, {{
+                STATUS status = xc->readMiscReg(MISCREG_STATUS);
+                if (status.fs == FPUStatus::OFF)
+                    return std::make_shared<IllegalInstFault>("FPU is off",
+                                                               machInst);
+
                 Fc1_bits = Mem;
             }}, {{
                 EA = rvZext(sp + offset);
@@ -330,6 +335,11 @@
                              CIMM1 << 5 |
                              CIMM5<1:0> << 6;
                 }}, {{
+                    STATUS status = xc->readMiscReg(MISCREG_STATUS);
+                    if (status.fs == FPUStatus::OFF)
+ return std::make_shared<IllegalInstFault>("FPU is off", + machInst);
+
                     freg_t fd;
                     fd = freg(f32(Mem_uw));
                     Fd_bits = fd.v;
@@ -387,6 +397,11 @@
                 offset = CIMM6<5:3> << 3 |
                          CIMM6<2:0> << 6;
             }}, {{
+                STATUS status = xc->readMiscReg(MISCREG_STATUS);
+                if (status.fs == FPUStatus::OFF)
+                    return std::make_shared<IllegalInstFault>("FPU is off",
+                                                               machInst);
+
                 Mem_ud = Fc2_bits;
             }}, {{
                 EA = rvZext(sp + offset);
@@ -404,6 +419,11 @@
                     offset = CIMM6<5:2> << 2 |
                              CIMM6<1:0> << 6;
                 }}, {{
+                    STATUS status = xc->readMiscReg(MISCREG_STATUS);
+                    if (status.fs == FPUStatus::OFF)
+ return std::make_shared<IllegalInstFault>("FPU is off", + machInst);
+
                     Mem_uw = unboxF32(boxF32(Fs2_bits));
                 }}, {{
                     EA = (uint32_t)(sp_uw + offset);

--
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Gerrit-MessageType: newchange
Gerrit-Project: public/gem5
Gerrit-Branch: develop
Gerrit-Change-Id: I7f2ef89786af0d528f2029f1097cfeac6c7d65f2
Gerrit-Change-Number: 71198
Gerrit-PatchSet: 1
Gerrit-Owner: Roger Chang <rogerycch...@google.com>
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