Hi, I believe in src/cpu/base.hh::121, class ProfileEvent : public Event that:
int interval; should be: Tick interval; src/cpu/base.hh::128 ProfileEvent(BaseCPU *cpu, int interval); should be: ProfileEvent(BaseCPU *cpu, Tick interval); and also in src/cpu/base.cc:360, BaseCPU::ProfileEvent::ProfileEvent(BaseCPU *_cpu, int _interval) should be BaseCPU::ProfileEvent::ProfileEvent(BaseCPU *_cpu, Tick _interval) Otherwise, this can cause problems because src/cpu/BaseCPU.py specifies the value as a latency. This was causing an assertion to fail in the eventq.hh:schedule() being called from src/cpu/base.cc:: BaseCPU::ProfileEvent::process() -Rick _______________________________________________ m5-dev mailing list m5-dev@m5sim.org http://m5sim.org/mailman/listinfo/m5-dev
