changeset 8fc3b004b0df in /z/repo/m5 details: http://repo.m5sim.org/m5?cmd=changeset;node=8fc3b004b0df description: arch: TheISA shouldn't really ever be used in the arch directory. We should always refer to the specific ISA in that arch directory. This is especially necessary if we're ever going to make it to the point where we actually have heterogeneous systems.
diffstat: 3 files changed, 2 insertions(+), 3 deletions(-) src/arch/alpha/ev5.cc | 2 +- src/arch/sparc/regfile.cc | 2 +- src/arch/x86/process.cc | 1 - diffs (truncated from 365 to 300 lines): diff -r 3440c9ad49b4 -r 8fc3b004b0df src/arch/alpha/ev5.cc --- a/src/arch/alpha/ev5.cc Sat Sep 27 21:03:45 2008 -0700 +++ b/src/arch/alpha/ev5.cc Sat Sep 27 21:03:46 2008 -0700 @@ -383,10 +383,10 @@ #if FULL_SYSTEM if (val & 0x18) { if (tc->getKernelStats()) - tc->getKernelStats()->mode(TheISA::Kernel::user, tc); + tc->getKernelStats()->mode(AlphaISA::Kernel::user, tc); } else { if (tc->getKernelStats()) - tc->getKernelStats()->mode(TheISA::Kernel::kernel, tc); + tc->getKernelStats()->mode(AlphaISA::Kernel::kernel, tc); } #endif diff -r 3440c9ad49b4 -r 8fc3b004b0df src/arch/alpha/idle_event.cc --- a/src/arch/alpha/idle_event.cc Sat Sep 27 21:03:45 2008 -0700 +++ b/src/arch/alpha/idle_event.cc Sat Sep 27 21:03:46 2008 -0700 @@ -33,7 +33,7 @@ #include "arch/alpha/kernel_stats.hh" #include "cpu/thread_context.hh" -using namespace TheISA; +using namespace AlphaISA; void IdleStartEvent::process(ThreadContext *tc) diff -r 3440c9ad49b4 -r 8fc3b004b0df src/arch/alpha/interrupts.hh --- a/src/arch/alpha/interrupts.hh Sat Sep 27 21:03:45 2008 -0700 +++ b/src/arch/alpha/interrupts.hh Sat Sep 27 21:03:46 2008 -0700 @@ -78,7 +78,7 @@ { DPRINTF(Interrupt, "Interrupt %d:%d cleared\n", int_num, index); - if (int_num < 0 || int_num >= TheISA::NumInterruptLevels) + if (int_num < 0 || int_num >= AlphaISA::NumInterruptLevels) panic("int_num out of bounds\n"); if (index < 0 || index >= (int)sizeof(uint64_t) * 8) diff -r 3440c9ad49b4 -r 8fc3b004b0df src/arch/alpha/linux/threadinfo.hh --- a/src/arch/alpha/linux/threadinfo.hh Sat Sep 27 21:03:45 2008 -0700 +++ b/src/arch/alpha/linux/threadinfo.hh Sat Sep 27 21:03:46 2008 -0700 @@ -55,7 +55,7 @@ CopyOut(tc, &data, addr, sizeof(T)); - data = TheISA::gtoh(data); + data = AlphaISA::gtoh(data); return true; } @@ -76,7 +76,7 @@ Addr sp; if (!addr) - addr = tc->readMiscRegNoEffect(TheISA::IPR_PALtemp23); + addr = tc->readMiscRegNoEffect(AlphaISA::IPR_PALtemp23); FunctionalPort *p = tc->getPhysPort(); p->readBlob(addr, (uint8_t *)&sp, sizeof(Addr)); diff -r 3440c9ad49b4 -r 8fc3b004b0df src/arch/alpha/regfile.cc --- a/src/arch/alpha/regfile.cc Sat Sep 27 21:03:45 2008 -0700 +++ b/src/arch/alpha/regfile.cc Sat Sep 27 21:03:46 2008 -0700 @@ -70,7 +70,7 @@ } // Then loop through the floating point registers. - for (int i = 0; i < TheISA::NumFloatRegs; ++i) { + for (int i = 0; i < AlphaISA::NumFloatRegs; ++i) { dest->setFloatRegBits(i, src->readFloatRegBits(i)); } diff -r 3440c9ad49b4 -r 8fc3b004b0df src/arch/alpha/remote_gdb.cc --- a/src/arch/alpha/remote_gdb.cc Sat Sep 27 21:03:45 2008 -0700 +++ b/src/arch/alpha/remote_gdb.cc Sat Sep 27 21:03:46 2008 -0700 @@ -140,7 +140,7 @@ #include "sim/system.hh" using namespace std; -using namespace TheISA; +using namespace AlphaISA; RemoteGDB::RemoteGDB(System *_system, ThreadContext *c) : BaseRemoteGDB(_system, c, KGDB_NUMREGS) @@ -161,12 +161,12 @@ #else Addr last_va; - va = TheISA::TruncPage(va); - last_va = TheISA::RoundPage(va + len); + va = AlphaISA::TruncPage(va); + last_va = AlphaISA::RoundPage(va + len); do { - if (TheISA::IsK0Seg(va)) { - if (va < (TheISA::K0SegBase + pmem->size())) { + if (AlphaISA::IsK0Seg(va)) { + if (va < (AlphaISA::K0SegBase + pmem->size())) { DPRINTF(GDBAcc, "acc: Mapping is valid K0SEG <= " "%#x < K0SEG + size\n", va); return true; @@ -188,12 +188,12 @@ return true; Addr ptbr = context->readMiscRegNoEffect(AlphaISA::IPR_PALtemp20); - TheISA::PageTableEntry pte = TheISA::kernel_pte_lookup(context->getPhysPort(), ptbr, va); + AlphaISA::PageTableEntry pte = AlphaISA::kernel_pte_lookup(context->getPhysPort(), ptbr, va); if (!pte.valid()) { DPRINTF(GDBAcc, "acc: %#x pte is invalid\n", va); return false; } - va += TheISA::PageBytes; + va += AlphaISA::PageBytes; } while (va < last_va); DPRINTF(GDBAcc, "acc: %#x mapping is valid\n", va); @@ -215,17 +215,17 @@ // @todo: Currently this is very Alpha specific. if (AlphaISA::PcPAL(gdbregs.regs[KGDB_REG_PC])) { - for (int i = 0; i < TheISA::NumIntArchRegs; ++i) { + for (int i = 0; i < AlphaISA::NumIntArchRegs; ++i) { gdbregs.regs[i] = context->readIntReg(AlphaISA::reg_redir[i]); } } else { - for (int i = 0; i < TheISA::NumIntArchRegs; ++i) { + for (int i = 0; i < AlphaISA::NumIntArchRegs; ++i) { gdbregs.regs[i] = context->readIntReg(i); } } #ifdef KGDB_FP_REGS - for (int i = 0; i < TheISA::NumFloatArchRegs; ++i) { + for (int i = 0; i < AlphaISA::NumFloatArchRegs; ++i) { gdbregs.regs[i + KGDB_REG_F0] = context->readFloatRegBits(i); } #endif @@ -242,17 +242,17 @@ { // @todo: Currently this is very Alpha specific. if (AlphaISA::PcPAL(gdbregs.regs[KGDB_REG_PC])) { - for (int i = 0; i < TheISA::NumIntArchRegs; ++i) { + for (int i = 0; i < AlphaISA::NumIntArchRegs; ++i) { context->setIntReg(AlphaISA::reg_redir[i], gdbregs.regs[i]); } } else { - for (int i = 0; i < TheISA::NumIntArchRegs; ++i) { + for (int i = 0; i < AlphaISA::NumIntArchRegs; ++i) { context->setIntReg(i, gdbregs.regs[i]); } } #ifdef KGDB_FP_REGS - for (int i = 0; i < TheISA::NumFloatArchRegs; ++i) { + for (int i = 0; i < AlphaISA::NumFloatArchRegs; ++i) { context->setFloatRegBits(i, gdbregs.regs[i + KGDB_REG_F0]); } #endif diff -r 3440c9ad49b4 -r 8fc3b004b0df src/arch/alpha/stacktrace.cc --- a/src/arch/alpha/stacktrace.cc Sat Sep 27 21:03:45 2008 -0700 +++ b/src/arch/alpha/stacktrace.cc Sat Sep 27 21:03:46 2008 -0700 @@ -159,7 +159,7 @@ } SymbolTable *symtab = tc->getSystemPtr()->kernelSymtab; - Addr ksp = tc->readIntReg(TheISA::StackPointerReg); + Addr ksp = tc->readIntReg(AlphaISA::StackPointerReg); Addr bottom = ksp & ~0x3fff; Addr addr; diff -r 3440c9ad49b4 -r 8fc3b004b0df src/arch/alpha/stacktrace.hh --- a/src/arch/alpha/stacktrace.hh Sat Sep 27 21:03:45 2008 -0700 +++ b/src/arch/alpha/stacktrace.hh Sat Sep 27 21:03:46 2008 -0700 @@ -62,7 +62,7 @@ class StackTrace { protected: - typedef TheISA::MachInst MachInst; + typedef AlphaISA::MachInst MachInst; private: ThreadContext *tc; std::vector<Addr> stack; diff -r 3440c9ad49b4 -r 8fc3b004b0df src/arch/alpha/tru64/process.cc --- a/src/arch/alpha/tru64/process.cc Sat Sep 27 21:03:45 2008 -0700 +++ b/src/arch/alpha/tru64/process.cc Sat Sep 27 21:03:46 2008 -0700 @@ -166,7 +166,7 @@ ThreadContext *tc) { using namespace std; - using namespace TheISA; + using namespace AlphaISA; int id = tc->getSyscallArg(0); // table ID int index = tc->getSyscallArg(1); // index into table diff -r 3440c9ad49b4 -r 8fc3b004b0df src/arch/mips/idle_event.cc --- a/src/arch/mips/idle_event.cc Sat Sep 27 21:03:45 2008 -0700 +++ b/src/arch/mips/idle_event.cc Sat Sep 27 21:03:46 2008 -0700 @@ -34,7 +34,7 @@ #include "arch/mips/kernel_stats.hh" #include "cpu/thread_context.hh" -using namespace TheISA; +using namespace MipsISA; void IdleStartEvent::process(ThreadContext *tc) diff -r 3440c9ad49b4 -r 8fc3b004b0df src/arch/mips/linux/threadinfo.hh --- a/src/arch/mips/linux/threadinfo.hh Sat Sep 27 21:03:45 2008 -0700 +++ b/src/arch/mips/linux/threadinfo.hh Sat Sep 27 21:03:46 2008 -0700 @@ -55,7 +55,7 @@ CopyOut(tc, &data, addr, sizeof(T)); - data = TheISA::gtoh(data); + data = MipsISA::gtoh(data); return true; } @@ -77,7 +77,7 @@ Addr sp; if (!addr) - addr = tc->readMiscRegNoEffect(0/*TheISA::IPR_PALtemp23*/); + addr = tc->readMiscRegNoEffect(0/*MipsISA::IPR_PALtemp23*/); FunctionalPort *p = tc->getPhysPort(); p->readBlob(addr, (uint8_t *)&sp, sizeof(Addr)); diff -r 3440c9ad49b4 -r 8fc3b004b0df src/arch/mips/regfile/misc_regfile.cc --- a/src/arch/mips/regfile/misc_regfile.cc Sat Sep 27 21:03:45 2008 -0700 +++ b/src/arch/mips/regfile/misc_regfile.cc Sat Sep 27 21:03:46 2008 -0700 @@ -186,7 +186,7 @@ num_threads, num_vpes); cpu = _cpu; - TheISA::CoreSpecific &cp = cpu->coreParams; + MipsISA::CoreSpecific &cp = cpu->coreParams; // Do Default CP0 initialization HERE diff -r 3440c9ad49b4 -r 8fc3b004b0df src/arch/mips/stacktrace.cc --- a/src/arch/mips/stacktrace.cc Sat Sep 27 21:03:45 2008 -0700 +++ b/src/arch/mips/stacktrace.cc Sat Sep 27 21:03:46 2008 -0700 @@ -159,7 +159,7 @@ // } // SymbolTable *symtab = tc->getSystemPtr()->kernelSymtab; -// Addr ksp = tc->readIntReg(TheISA::StackPointerReg); +// Addr ksp = tc->readIntReg(MipsISA::StackPointerReg); // Addr bottom = ksp & ~0x3fff; // Addr addr; diff -r 3440c9ad49b4 -r 8fc3b004b0df src/arch/mips/stacktrace.hh --- a/src/arch/mips/stacktrace.hh Sat Sep 27 21:03:45 2008 -0700 +++ b/src/arch/mips/stacktrace.hh Sat Sep 27 21:03:46 2008 -0700 @@ -61,7 +61,7 @@ class StackTrace { protected: - typedef TheISA::MachInst MachInst; + typedef MipsISA::MachInst MachInst; private: ThreadContext *tc; std::vector<Addr> stack; diff -r 3440c9ad49b4 -r 8fc3b004b0df src/arch/sparc/process.cc --- a/src/arch/sparc/process.cc Sat Sep 27 21:03:45 2008 -0700 +++ b/src/arch/sparc/process.cc Sat Sep 27 21:03:46 2008 -0700 @@ -354,7 +354,7 @@ // figure out argc IntType argc = argv.size(); - IntType guestArgc = TheISA::htog(argc); + IntType guestArgc = SparcISA::htog(argc); //Write out the sentry void * uint64_t sentry_NULL = 0; diff -r 3440c9ad49b4 -r 8fc3b004b0df src/arch/sparc/regfile.cc --- a/src/arch/sparc/regfile.cc Sat Sep 27 21:03:45 2008 -0700 +++ b/src/arch/sparc/regfile.cc Sat Sep 27 21:03:46 2008 -0700 @@ -366,12 +366,12 @@ void SparcISA::copyRegs(ThreadContext *src, ThreadContext *dest) { // First loop through the integer registers. - for (int i = 0; i < TheISA::NumIntRegs; ++i) { + for (int i = 0; i < SparcISA::NumIntRegs; ++i) { dest->setIntReg(i, src->readIntReg(i)); } // Then loop through the floating point registers. - for (int i = 0; i < TheISA::NumFloatRegs; ++i) { + for (int i = 0; i < SparcISA::NumFloatRegs; ++i) { dest->setFloatRegBits(i, src->readFloatRegBits(i)); } diff -r 3440c9ad49b4 -r 8fc3b004b0df src/arch/sparc/remote_gdb.cc --- a/src/arch/sparc/remote_gdb.cc Sat Sep 27 21:03:45 2008 -0700 +++ b/src/arch/sparc/remote_gdb.cc Sat Sep 27 21:03:46 2008 -0700 @@ -137,7 +137,7 @@ #include "sim/system.hh" _______________________________________________ m5-dev mailing list m5-dev@m5sim.org http://m5sim.org/mailman/listinfo/m5-dev