changeset 8d96bbe4cc84 in /z/repo/m5
details: http://repo.m5sim.org/m5?cmd=changeset;node=8d96bbe4cc84
description:
Automated merge with ssh://m5sim.org//repo/m5
diffstat:
0 files changed
diffs (24 lines):
diff -r 11e6f4fa85c3 -r 8d96bbe4cc84 src/arch/sparc/ua2005.cc
--- a/src/arch/sparc/ua2005.cc Wed Nov 05 18:10:30 2008 -0500
+++ b/src/arch/sparc/ua2005.cc Wed Nov 05 18:12:21 2008 -0500
@@ -257,7 +257,7 @@
temp = readRegNoEffect(miscReg) & (STS::active | STS::speculative);
// Check that the CPU array is fully populated
// (by calling getNumCPus())
- assert(sys->getNumContexts() > tc->contextId());
+ assert(sys->numContexts() > tc->contextId());
temp |= tc->contextId() << STS::shft_id;
diff -r 11e6f4fa85c3 -r 8d96bbe4cc84 src/dev/x86/i82094aa.cc
--- a/src/dev/x86/i82094aa.cc Wed Nov 05 18:10:30 2008 -0500
+++ b/src/dev/x86/i82094aa.cc Wed Nov 05 18:12:21 2008 -0500
@@ -39,7 +39,7 @@
latency(p->pio_latency), pioAddr(p->pio_addr), extIntPic(NULL)
{
// This assumes there's only one I/O APIC in the system
- id = sys->getNumCPUs();
+ id = sys->numContexts();
assert(id <= 0xf);
arbId = id;
regSel = 0;
_______________________________________________
m5-dev mailing list
m5-dev@m5sim.org
http://m5sim.org/mailman/listinfo/m5-dev
