Since I'm rearranging the CPU models a bit to get rid of the translate... functions, I want to try at least compiling them to make sure everything still works. Unfortunately the "FreeList" traceflag is defined in I think both the in order and o3 models which makes scons choke. There also seem to be places where o3 is partially compiled even when it's left out for Alpha. I'm not sure exactly what's going on there. There may be some interaction between the in order model and o3 there.
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