[m5-dev] changeset in m5: Give TimeBuffer an ID that can be set. Necessar...

[Korey Sewell]

changeset 4842a7d78634 in /z/repo/m5
details: http://repo.m5sim.org/m5?cmd=changeset;node=4842a7d78634
description:
        Give TimeBuffer an ID that can be set. Necessary because InOrder uses 
generic stages so w/o an ID there is no way to differentiate buffers when 
debugging

diffstat:

3 files changed, 19 insertions(+), 7 deletions(-)
src/base/timebuf.hh               |   13 +++++++++++++
src/cpu/inorder/cpu.cc            |    4 +---
src/cpu/inorder/pipeline_stage.cc |    9 +++++----

diffs (79 lines):

diff -r 2a2c2403ee5b -r 4842a7d78634 src/base/timebuf.hh
--- a/src/base/timebuf.hh       Wed Mar 04 13:16:48 2009 -0500
+++ b/src/base/timebuf.hh       Wed Mar 04 13:16:49 2009 -0500
@@ -43,6 +43,7 @@
     int past;
     int future;
     int size;
+    int _id;
 
     char *data;
     std::vector<char *> index;
@@ -148,6 +149,8 @@
             new (ptr) T;
             ptr += sizeof(T);
         }
+
+        _id = -1;
     }
 
     TimeBuffer()
@@ -162,6 +165,16 @@
         delete [] data;
     }
 
+    void id(int id)
+    {
+        _id = id;
+    }
+
+    int id()
+    {
+        return _id;
+    }
+
     void
     advance()
     {
diff -r 2a2c2403ee5b -r 4842a7d78634 src/cpu/inorder/cpu.cc
--- a/src/cpu/inorder/cpu.cc    Wed Mar 04 13:16:48 2009 -0500
+++ b/src/cpu/inorder/cpu.cc    Wed Mar 04 13:16:49 2009 -0500
@@ -230,11 +230,9 @@
     }
 
     // Initialize TimeBuffer Stage Queues
-    // For now just have these time buffers be pretty big.
-    // @note: This could be statically allocated but changes
-    // would have to be made to the standard time buffer class.
     for (int stNum=0; stNum < NumStages - 1; stNum++) {
         stageQueue[stNum] = new StageQueue(NumStages, NumStages);
+        stageQueue[stNum]->id(stNum);
     }
 
 
diff -r 2a2c2403ee5b -r 4842a7d78634 src/cpu/inorder/pipeline_stage.cc
--- a/src/cpu/inorder/pipeline_stage.cc Wed Mar 04 13:16:48 2009 -0500
+++ b/src/cpu/inorder/pipeline_stage.cc Wed Mar 04 13:16:49 2009 -0500
@@ -556,8 +556,8 @@
     if (prevStageValid) {
         int insts_from_prev_stage = prevStage->size;
 
-        DPRINTF(InOrderStage, "%i insts available from previous stage.\n",
-                insts_from_prev_stage);
+        DPRINTF(InOrderStage, "%i insts available from stage buffer %i.\n",
+                insts_from_prev_stage, prevStageQueue->id());
 
         for (int i = 0; i < insts_from_prev_stage; ++i) {
 
@@ -985,8 +985,9 @@
                     tid, cpu->pipelineStage[next_stage]->stageBufferAvail());
 
             DPRINTF(InOrderStage, "[tid:%u]: [sn:%i]: being placed into  "
-                    "index %i stage %i queue.\n",
-                    tid, inst->seqNum, toNextStageIndex, inst->nextStage);
+                    "index %i of stage buffer %i queue.\n",
+                    tid, inst->seqNum, toNextStageIndex,
+                    cpu->pipelineStage[prev_stage]->nextStageQueue->id());
 
             int next_stage_idx = 
cpu->pipelineStage[prev_stage]->nextStage->size;
 
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