changeset 7b0f907855d5 in /z/repo/m5
details: http://repo.m5sim.org/m5?cmd=changeset;node=7b0f907855d5
description:
X86: Extend mov2int and mov2fp so they can support insert and extract
instructions.
diffstat:
1 file changed, 32 insertions(+), 11 deletions(-)
src/arch/x86/isa/microops/mediaop.isa | 43 ++++++++++++++++++++++++---------
diffs (60 lines):
diff -r f449753172ee -r 7b0f907855d5 src/arch/x86/isa/microops/mediaop.isa
--- a/src/arch/x86/isa/microops/mediaop.isa Mon Aug 17 20:15:16 2009 -0700
+++ b/src/arch/x86/isa/microops/mediaop.isa Mon Aug 17 20:22:56 2009 -0700
@@ -289,24 +289,45 @@
return allocator
class Mov2int(MediaOp):
- def __init__(self, dest, src, \
+ def __init__(self, dest, src1, src2 = 0, \
size = None, destSize = None, srcSize = None, ext = None):
- super(Mov2int, self).__init__(dest, src,\
- "InstRegIndex(0)", size, destSize, srcSize, ext)
+ super(Mov2int, self).__init__(dest, src1,\
+ src2, size, destSize, srcSize, ext)
code = '''
- uint64_t fpSrcReg1 = bits(FpSrcReg1.uqw, srcSize * 8 - 1, 0);
- DestReg = merge(DestReg, fpSrcReg1, destSize);
+ int items = sizeof(FloatRegBits) / srcSize;
+ int offset = imm8;
+ if (bits(src1, 0) && (ext & 0x1))
+ offset -= items;
+ if (offset >= 0 && offset < items) {
+ uint64_t fpSrcReg1 =
+ bits(FpSrcReg1.uqw,
+ (offset + 1) * srcSize * 8 - 1,
+ (offset + 0) * srcSize * 8);
+ DestReg = merge(0, fpSrcReg1, destSize);
+ } else {
+ DestReg = DestReg;
+ }
'''
class Mov2fp(MediaOp):
- def __init__(self, dest, src, \
+ def __init__(self, dest, src1, src2 = 0, \
size = None, destSize = None, srcSize = None, ext = None):
- super(Mov2fp, self).__init__(dest, src,\
- "InstRegIndex(0)", size, destSize, srcSize, ext)
+ super(Mov2fp, self).__init__(dest, src1,\
+ src2, size, destSize, srcSize, ext)
code = '''
- uint64_t srcReg1 = pick(SrcReg1, 0, srcSize);
- FpDestReg.uqw =
- insertBits(FpDestReg.uqw, destSize * 8 - 1, 0, srcReg1);
+ int items = sizeof(FloatRegBits) / destSize;
+ int offset = imm8;
+ if (bits(dest, 0) && (ext & 0x1))
+ offset -= items;
+ if (offset >= 0 && offset < items) {
+ uint64_t srcReg1 = pick(SrcReg1, 0, srcSize);
+ FpDestReg.uqw =
+ insertBits(FpDestReg.uqw,
+ (offset + 1) * destSize * 8 - 1,
+ (offset + 0) * destSize * 8, srcReg1);
+ } else {
+ FpDestReg.uqw = FpDestReg.uqw;
+ }
'''
class Unpack(MediaOp):
_______________________________________________
m5-dev mailing list
[email protected]
http://m5sim.org/mailman/listinfo/m5-dev