Hello I tried tracking this problem down, but as usual I quickly get lost digging through the uop generation code.
On x86_se with the simple atomic processor, a prefetch instruction that tries to load an invalid address aborts the simulation even when it shouldn't. I've tested to make sure real hardware does not exhibit this problem. Attached is a sample test case that does two different PREFETCH_T0_M instructions. m5 can handle the prefetch of the valid address, but aborts on the second one. This particular bug keeps most of spec2k from working on x86_64. Vince
prefetch
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