[m5-dev] changeset in m5: ISA: Fix compilation.

[Gabe Black]

changeset 34191eea18c1 in /z/repo/m5
details: http://repo.m5sim.org/m5?cmd=changeset;node=34191eea18c1
description:
        ISA: Fix compilation.

diffstat:

5 files changed, 15 insertions(+), 10 deletions(-)
src/arch/alpha/isa.cc    |    4 ++--
src/arch/alpha/isa.hh    |    5 +++--
src/arch/arm/isa.hh      |    5 +++--
src/arch/mips/isa.hh     |    7 +++++--
src/cpu/simple_thread.cc |    4 ++--

diffs (90 lines):

diff -r b741b3e7164b -r 34191eea18c1 src/arch/alpha/isa.cc
--- a/src/arch/alpha/isa.cc     Thu Oct 15 15:15:24 2009 -0700
+++ b/src/arch/alpha/isa.cc     Sat Oct 17 01:13:41 2009 -0700
@@ -36,7 +36,7 @@
 {
 
 void
-ISA::serialize(std::ostream &os)
+ISA::serialize(EventManager *em, std::ostream &os)
 {
     SERIALIZE_SCALAR(fpcr);
     SERIALIZE_SCALAR(uniq);
@@ -46,7 +46,7 @@
 }
 
 void
-ISA::unserialize(Checkpoint *cp, const std::string &section)
+ISA::unserialize(EventManager *em, Checkpoint *cp, const std::string &section)
 {
     UNSERIALIZE_SCALAR(fpcr);
     UNSERIALIZE_SCALAR(uniq);
diff -r b741b3e7164b -r 34191eea18c1 src/arch/alpha/isa.hh
--- a/src/arch/alpha/isa.hh     Thu Oct 15 15:15:24 2009 -0700
+++ b/src/arch/alpha/isa.hh     Sat Oct 17 01:13:41 2009 -0700
@@ -83,8 +83,9 @@
             intr_flag = 0;
         }
 
-        void serialize(std::ostream &os);
-        void unserialize(Checkpoint *cp, const std::string &section);
+        void serialize(EventManager *em, std::ostream &os);
+        void unserialize(EventManager *em, Checkpoint *cp,
+                const std::string &section);
 
         void reset(std::string core_name, ThreadID num_threads,
                    unsigned num_vpes, BaseCPU *_cpu)
diff -r b741b3e7164b -r 34191eea18c1 src/arch/arm/isa.hh
--- a/src/arch/arm/isa.hh       Thu Oct 15 15:15:24 2009 -0700
+++ b/src/arch/arm/isa.hh       Sat Oct 17 01:13:41 2009 -0700
@@ -95,9 +95,10 @@
             return reg;
         }
 
-        void serialize(std::ostream &os)
+        void serialize(EventManager *em, std::ostream &os)
         {}
-        void unserialize(Checkpoint *cp, const std::string &section)
+        void unserialize(EventManager *em, Checkpoint *cp,
+                const std::string &section)
         {}
 
         ISA()
diff -r b741b3e7164b -r 34191eea18c1 src/arch/mips/isa.hh
--- a/src/arch/mips/isa.hh      Thu Oct 15 15:15:24 2009 -0700
+++ b/src/arch/mips/isa.hh      Sat Oct 17 01:13:41 2009 -0700
@@ -172,8 +172,11 @@
             return reg;
         }
 
-        void serialize(std::ostream &os);
-        void unserialize(Checkpoint *cp, const std::string &section);
+        void serialize(EventManager *em, std::ostream &os)
+        {}
+        void unserialize(EventManager *em, Checkpoint *cp,
+                const std::string &section)
+        {}
     };
 }
 
diff -r b741b3e7164b -r 34191eea18c1 src/cpu/simple_thread.cc
--- a/src/cpu/simple_thread.cc  Thu Oct 15 15:15:24 2009 -0700
+++ b/src/cpu/simple_thread.cc  Sat Oct 17 01:13:41 2009 -0700
@@ -203,7 +203,7 @@
     // 
     // Now must serialize all the ISA dependent state
     //
-    isa.serialize(os);
+    isa.serialize(cpu, os);
 }
 
 
@@ -223,7 +223,7 @@
     // 
     // Now must unserialize all the ISA dependent state
     //
-    isa.unserialize(cp, section);
+    isa.unserialize(cpu, cp, section);
 }
 
 #if FULL_SYSTEM
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