# HG changeset patch # User Derek Hower <d...@cs.wisc.edu> # Date 1253065794 18000 # Node ID b8421af116e59abbb3327cd48320c90e5a65b12e # Parent de4b394c67924fb439bd7df2b8bd0ae84647f0ab removed isReady from the library interface
diff --git a/src/mem/ruby/libruby.cc b/src/mem/ruby/libruby.cc --- a/src/mem/ruby/libruby.cc +++ b/src/mem/ruby/libruby.cc @@ -133,10 +133,6 @@ RubySystem::getMemoryVector()->read(Address(paddr), data, len); } -bool libruby_isReady(RubyPortHandle p, struct RubyRequest request) { - return static_cast<RubyPort*>(p)->isReady(request, true); -} - int64_t libruby_issue_request(RubyPortHandle p, struct RubyRequest request) { return static_cast<RubyPort*>(p)->makeRequest(request); diff --git a/src/mem/ruby/libruby.hh b/src/mem/ruby/libruby.hh --- a/src/mem/ruby/libruby.hh +++ b/src/mem/ruby/libruby.hh @@ -76,12 +76,6 @@ */ int64_t libruby_issue_request(RubyPortHandle p, struct RubyRequest request); - -/** - * - */ -bool libruby_isReady(RubyPortHandle p, struct RubyRequest request); - /** * writes data directly into Ruby's data array. Note that this * ignores caches, and should be considered incoherent after diff --git a/src/mem/ruby/system/RubyPort.hh b/src/mem/ruby/system/RubyPort.hh --- a/src/mem/ruby/system/RubyPort.hh +++ b/src/mem/ruby/system/RubyPort.hh @@ -21,8 +21,6 @@ virtual int64_t makeRequest(const RubyRequest & request) = 0; - virtual bool isReady(const RubyRequest & request, bool dont_set = false) = 0; - void registerHitCallback(void (*hit_callback)(int64_t request_id)) { assert(m_hit_callback == NULL); // can't assign hit_callback twice m_hit_callback = hit_callback; _______________________________________________ m5-dev mailing list m5-dev@m5sim.org http://m5sim.org/mailman/listinfo/m5-dev