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FS#305 - Checkpoint Support for InOrderCPU User who did this: - Korey Sewell (ksewell) Attached to Project - M5 Bugs Summary - Checkpoint Support for InOrderCPU Task Type - Minor Enhancement Category - CPU Status - New Assigned To - Korey Sewell Operating System - All Severity - Low Priority - Normal Reported Version - 2.0beta3 Due in Version - 2.0 release Due Date - Undecided Percent Complete - 0% Details - Changing from "Merge and Test Checkpointing code for MIPS ISA" to "Checkpoint code for InOrderCPU" ... Most of the inorder work has been done for MIPS anyway, but one of our users (s.roy) has the checkpoint code "working" for InOrder-Alpha-SE so hopefully we can benefit from his work here. More information can be found at the following URL: http://www.m5sim.org/flyspray/task/305 You are receiving this message because you have requested it from the Flyspray bugtracking system. You can be removed from future notifications by visiting the URL shown above. _______________________________________________ m5-dev mailing list [email protected] http://m5sim.org/mailman/listinfo/m5-dev
