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You're commit message needs reformatting. The first line is much too long. src/arch/arm/registers.hh <http://reviews.m5sim.org/r/227/#comment432> Lets avoid trivial whitespace changes mixed in with other stuff. Please make this a separate change. src/arch/arm/registers.hh <http://reviews.m5sim.org/r/227/#comment431> Why was this added? I'm mostly just curious. Did something depend on it? I don't like the idea of constants trivially and consistently derived from other constants being defined in all the ISAs, but it's probably not worth doing anything about it here. - Gabe On 2010-08-23 09:36:10, Ali Saidi wrote: > > ----------------------------------------------------------- > This is an automatically generated e-mail. To reply, visit: > http://reviews.m5sim.org/r/227/ > ----------------------------------------------------------- > > (Updated 2010-08-23 09:36:10) > > > Review request for Default. > > > Summary > ------- > > ARM: fixed a bug in the arm register flattening logic (FP_Base_DepTag was set > too low) > when decoding a srs instruction, invalid mode encoding returns invalid > instruction. > this can happen when garbage instructions are fetched from mispredicted path > > > Diffs > ----- > > src/arch/arm/registers.hh 47d9409b2b7f > src/cpu/o3/rename_impl.hh 47d9409b2b7f > > Diff: http://reviews.m5sim.org/r/227/diff > > > Testing > ------- > > > Thanks, > > Ali > > _______________________________________________ m5-dev mailing list m5-dev@m5sim.org http://m5sim.org/mailman/listinfo/m5-dev
