changeset acf43d6bbc18 in /z/repo/m5
details: http://repo.m5sim.org/m5?cmd=changeset;node=acf43d6bbc18
description:
        testers: move testers to a new directory

        This patch moves the testers to a new subdirectory under src/cpu and 
includes
        the necessary fixes to work with latest m5 initialization patches.

diffstat:

 configs/example/determ_test.py                         |  126 ----
 configs/example/memtest-ruby.py                        |   24 +-
 configs/example/ruby_direct_test.py                    |  126 ++++
 configs/example/rubytest.py                            |    2 +-
 configs/ruby/MOESI_hammer.py                           |    5 +-
 src/cpu/directedtest/DirectedGenerator.cc              |   44 -
 src/cpu/directedtest/DirectedGenerator.hh              |   56 --
 src/cpu/directedtest/InvalidateGenerator.cc            |  142 -----
 src/cpu/directedtest/InvalidateGenerator.hh            |   63 --
 src/cpu/directedtest/RubyDirectedTester.cc             |  136 -----
 src/cpu/directedtest/RubyDirectedTester.hh             |  118 ----
 src/cpu/directedtest/RubyDirectedTester.py             |   52 --
 src/cpu/directedtest/SConscript                        |   48 -
 src/cpu/directedtest/SeriesRequestGenerator.cc         |  114 ----
 src/cpu/directedtest/SeriesRequestGenerator.hh         |   63 --
 src/cpu/memtest/MemTest.py                             |   52 --
 src/cpu/memtest/SConscript                             |   38 -
 src/cpu/memtest/memtest.cc                             |  434 -----------------
 src/cpu/memtest/memtest.hh                             |  198 -------
 src/cpu/rubytest/Check.cc                              |  356 -------------
 src/cpu/rubytest/Check.hh                              |   89 ---
 src/cpu/rubytest/CheckTable.cc                         |  130 -----
 src/cpu/rubytest/CheckTable.hh                         |   81 ---
 src/cpu/rubytest/RubyTester.cc                         |  195 -------
 src/cpu/rubytest/RubyTester.hh                         |  148 -----
 src/cpu/rubytest/RubyTester.py                         |   38 -
 src/cpu/rubytest/SConscript                            |   47 -
 src/cpu/testers/directedtest/DirectedGenerator.cc      |   44 +
 src/cpu/testers/directedtest/DirectedGenerator.hh      |   56 ++
 src/cpu/testers/directedtest/InvalidateGenerator.cc    |  142 +++++
 src/cpu/testers/directedtest/InvalidateGenerator.hh    |   63 ++
 src/cpu/testers/directedtest/RubyDirectedTester.cc     |  136 +++++
 src/cpu/testers/directedtest/RubyDirectedTester.hh     |  118 ++++
 src/cpu/testers/directedtest/RubyDirectedTester.py     |   52 ++
 src/cpu/testers/directedtest/SConscript                |   48 +
 src/cpu/testers/directedtest/SeriesRequestGenerator.cc |  114 ++++
 src/cpu/testers/directedtest/SeriesRequestGenerator.hh |   63 ++
 src/cpu/testers/memtest/MemTest.py                     |   52 ++
 src/cpu/testers/memtest/SConscript                     |   38 +
 src/cpu/testers/memtest/memtest.cc                     |  434 +++++++++++++++++
 src/cpu/testers/memtest/memtest.hh                     |  198 +++++++
 src/cpu/testers/rubytest/Check.cc                      |  356 +++++++++++++
 src/cpu/testers/rubytest/Check.hh                      |   89 +++
 src/cpu/testers/rubytest/CheckTable.cc                 |  130 +++++
 src/cpu/testers/rubytest/CheckTable.hh                 |   81 +++
 src/cpu/testers/rubytest/RubyTester.cc                 |  195 +++++++
 src/cpu/testers/rubytest/RubyTester.hh                 |  148 +++++
 src/cpu/testers/rubytest/RubyTester.py                 |   38 +
 src/cpu/testers/rubytest/SConscript                    |   47 +
 src/mem/ruby/system/RubyPort.cc                        |    2 +-
 src/mem/ruby/system/Sequencer.cc                       |    2 +-
 51 files changed, 2787 insertions(+), 2784 deletions(-)

diffs (truncated from 5815 to 300 lines):

diff -r 9bd6e86476d2 -r acf43d6bbc18 configs/example/determ_test.py
--- a/configs/example/determ_test.py    Tue Aug 24 12:06:53 2010 -0700
+++ /dev/null   Thu Jan 01 00:00:00 1970 +0000
@@ -1,126 +0,0 @@
-# Copyright (c) 2006-2007 The Regents of The University of Michigan
-# Copyright (c) 2009 Advanced Micro Devices, Inc.
-# All rights reserved.
-#
-# Redistribution and use in source and binary forms, with or without
-# modification, are permitted provided that the following conditions are
-# met: redistributions of source code must retain the above copyright
-# notice, this list of conditions and the following disclaimer;
-# redistributions in binary form must reproduce the above copyright
-# notice, this list of conditions and the following disclaimer in the
-# documentation and/or other materials provided with the distribution;
-# neither the name of the copyright holders nor the names of its
-# contributors may be used to endorse or promote products derived from
-# this software without specific prior written permission.
-#
-# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
-# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
-# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
-# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
-# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
-# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
-# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
-# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-#
-# Authors: Ron Dreslinski
-#          Brad Beckmann
-
-import m5
-from m5.objects import *
-from m5.defines import buildEnv
-from m5.util import addToPath
-import os, optparse, sys
-addToPath('../common')
-addToPath('../ruby')
-
-import Ruby
-
-if buildEnv['FULL_SYSTEM']:
-    panic("This script requires system-emulation mode (*_SE).")
-
-# Get paths we might need.  It's expected this file is in m5/configs/example.
-config_path = os.path.dirname(os.path.abspath(__file__))
-config_root = os.path.dirname(config_path)
-m5_root = os.path.dirname(config_root)
-
-parser = optparse.OptionParser()
-
-parser.add_option("-l", "--requests", metavar="N", default=100,
-                  help="Stop after N requests")
-parser.add_option("-f", "--wakeup_freq", metavar="N", default=10,
-                  help="Wakeup every N cycles")
-parser.add_option("--test-type", type="string", default="SeriesGetx",
-                  help="SeriesGetx|SeriesGets|Invalidate")
-
-#
-# Add the ruby specific and protocol specific options
-#
-Ruby.define_options(parser)
-
-execfile(os.path.join(config_root, "common", "Options.py"))
-
-(options, args) = parser.parse_args()
-
-if args:
-     print "Error: script doesn't take any positional arguments"
-     sys.exit(1)
-
-#
-# Select the directed generator
-#
-if options.test_type == "SeriesGetx":
-    generator = SeriesRequestGenerator(num_cpus = options.num_cpus,
-                                             issue_writes = True)
-elif options.test_type == "SeriesGets":
-    generator = SeriesRequestGenerator(num_cpus = options.num_cpus,
-                                             issue_writes = False)
-elif options.test_type == "Invalidate":
-    generator = InvalidateGenerator(num_cpus = options.num_cpus)
-else:
-    print "Error: unknown directed generator"
-    sys.exit(1)
-
-#
-# Create the M5 system.  Note that the PhysicalMemory Object isn't
-# actually used by the rubytester, but is included to support the
-# M5 memory size == Ruby memory size checks
-#
-system = System(physmem = PhysicalMemory())
-
-#
-# Create the ruby random tester
-#
-system.tester = RubyDirectedTester(requests_to_complete = \
-                                   options.requests,
-                                 generator = generator)
-
-system.ruby = Ruby.create_system(options, system)
-
-assert(options.num_cpus == len(system.ruby.cpu_ruby_ports))
-
-for ruby_port in system.ruby.cpu_ruby_ports:
-    #
-    # Tie the ruby tester ports to the ruby cpu ports
-    #
-    system.tester.cpuPort = ruby_port.port
-
-# -----------------------
-# run simulation
-# -----------------------
-
-root = Root( system = system )
-root.system.mem_mode = 'timing'
-
-# Not much point in this being higher than the L1 latency
-m5.ticks.setGlobalFrequency('1ns')
-
-# instantiate configuration
-m5.instantiate()
-
-# simulate until program terminates
-exit_event = m5.simulate(options.maxtick)
-
-print 'Exiting @ tick', m5.curTick(), 'because', exit_event.getCause()
diff -r 9bd6e86476d2 -r acf43d6bbc18 configs/example/memtest-ruby.py
--- a/configs/example/memtest-ruby.py   Tue Aug 24 12:06:53 2010 -0700
+++ b/configs/example/memtest-ruby.py   Tue Aug 24 12:07:22 2010 -0700
@@ -104,17 +104,21 @@
                 funcmem = PhysicalMemory(),
                 physmem = PhysicalMemory())
 
-system.dmas = [ MemTest(atomic = False, \
-                        max_loads = options.maxloads, \
-                        issue_dmas = True, \
-                        percent_functional = 0, \
-                        percent_uncacheable = 0, \
-                        progress_interval = options.progress) \
-                for i in xrange(options.num_dmas) ]
+if options.num_dmas > 0:
+    dmas = [ MemTest(atomic = False, \
+                     max_loads = options.maxloads, \
+                     issue_dmas = True, \
+                     percent_functional = 0, \
+                     percent_uncacheable = 0, \
+                     progress_interval = options.progress) \
+             for i in xrange(options.num_dmas) ]
+    system.dma_devices = dmas
+else:
+    dmas = []
 
 system.ruby = Ruby.create_system(options, \
-                                 system.physmem, \
-                                 dma_devices = system.dmas)
+                                 system, \
+                                 dma_devices = dmas)
 
 #
 # The tester is most effective when randomization is turned on and
@@ -131,7 +135,7 @@
     cpu.test = system.ruby.cpu_ruby_ports[i].port
     cpu.functional = system.funcmem.port
 
-for (i, dma) in enumerate(system.dmas):
+for (i, dma) in enumerate(dmas):
     #
     # Tie the dma memtester ports to the correct functional port
     # Note that the test port has already been connected to the dma_sequencer
diff -r 9bd6e86476d2 -r acf43d6bbc18 configs/example/ruby_direct_test.py
--- /dev/null   Thu Jan 01 00:00:00 1970 +0000
+++ b/configs/example/ruby_direct_test.py       Tue Aug 24 12:07:22 2010 -0700
@@ -0,0 +1,126 @@
+# Copyright (c) 2006-2007 The Regents of The University of Michigan
+# Copyright (c) 2009 Advanced Micro Devices, Inc.
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions are
+# met: redistributions of source code must retain the above copyright
+# notice, this list of conditions and the following disclaimer;
+# redistributions in binary form must reproduce the above copyright
+# notice, this list of conditions and the following disclaimer in the
+# documentation and/or other materials provided with the distribution;
+# neither the name of the copyright holders nor the names of its
+# contributors may be used to endorse or promote products derived from
+# this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+#
+# Authors: Ron Dreslinski
+#          Brad Beckmann
+
+import m5
+from m5.objects import *
+from m5.defines import buildEnv
+from m5.util import addToPath
+import os, optparse, sys
+addToPath('../common')
+addToPath('../ruby')
+
+import Ruby
+
+if buildEnv['FULL_SYSTEM']:
+    panic("This script requires system-emulation mode (*_SE).")
+
+# Get paths we might need.  It's expected this file is in m5/configs/example.
+config_path = os.path.dirname(os.path.abspath(__file__))
+config_root = os.path.dirname(config_path)
+m5_root = os.path.dirname(config_root)
+
+parser = optparse.OptionParser()
+
+parser.add_option("-l", "--requests", metavar="N", default=100,
+                  help="Stop after N requests")
+parser.add_option("-f", "--wakeup_freq", metavar="N", default=10,
+                  help="Wakeup every N cycles")
+parser.add_option("--test-type", type="string", default="SeriesGetx",
+                  help="SeriesGetx|SeriesGets|Invalidate")
+
+#
+# Add the ruby specific and protocol specific options
+#
+Ruby.define_options(parser)
+
+execfile(os.path.join(config_root, "common", "Options.py"))
+
+(options, args) = parser.parse_args()
+
+if args:
+     print "Error: script doesn't take any positional arguments"
+     sys.exit(1)
+
+#
+# Select the direct test generator
+#
+if options.test_type == "SeriesGetx":
+    generator = SeriesRequestGenerator(num_cpus = options.num_cpus,
+                                             issue_writes = True)
+elif options.test_type == "SeriesGets":
+    generator = SeriesRequestGenerator(num_cpus = options.num_cpus,
+                                             issue_writes = False)
+elif options.test_type == "Invalidate":
+    generator = InvalidateGenerator(num_cpus = options.num_cpus)
+else:
+    print "Error: unknown direct test generator"
+    sys.exit(1)
+
+#
+# Create the M5 system.  Note that the PhysicalMemory Object isn't
+# actually used by the rubytester, but is included to support the
+# M5 memory size == Ruby memory size checks
+#
+system = System(physmem = PhysicalMemory())
+
+#
+# Create the ruby random tester
+#
+system.tester = RubyDirectedTester(requests_to_complete = \
+                                   options.requests,
+                                   generator = generator)
+
+system.ruby = Ruby.create_system(options, system)
+
+assert(options.num_cpus == len(system.ruby.cpu_ruby_ports))
+
+for ruby_port in system.ruby.cpu_ruby_ports:
+    #
+    # Tie the ruby tester ports to the ruby cpu ports
+    #
+    system.tester.cpuPort = ruby_port.port
+
+# -----------------------
+# run simulation
+# -----------------------
+
+root = Root( system = system )
+root.system.mem_mode = 'timing'
+
+# Not much point in this being higher than the L1 latency
+m5.ticks.setGlobalFrequency('1ns')
+
+# instantiate configuration
+m5.instantiate()
+
+# simulate until program terminates
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