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src/cpu/o3/fetch_impl.hh <http://reviews.m5sim.org/r/343/#comment814> Is it ever the case that branchMispredict is true but mispredictInst is not set? I don't think so. In that case I'd get rid of the redundant flag and clean up this control flow; I don't think nested ifs are needed (though I might be wrong). Also the old comment doesn't really fit in context very well and should be updated. src/cpu/o3/iew_impl.hh <http://reviews.m5sim.org/r/343/#comment813> This line should be moved up to line 458 with the other misprediction-related signals. - Steve On 2010-12-06 16:12:44, Ali Saidi wrote: > > ----------------------------------------------------------- > This is an automatically generated e-mail. To reply, visit: > http://reviews.m5sim.org/r/343/ > ----------------------------------------------------------- > > (Updated 2010-12-06 16:12:44) > > > Review request for Default, Ali Saidi, Gabe Black, Steve Reinhardt, and > Nathan Binkert. > > > Summary > ------- > > Fix mispredicts from non control instructions. The squash inside the > fetch unit should not attempt to remove them from the branch predictor > as non-control instructions are not pushed into the predictor. > > > Diffs > ----- > > src/cpu/o3/comm.hh 2b5fbdcbfb5d > src/cpu/o3/commit_impl.hh 2b5fbdcbfb5d > src/cpu/o3/fetch_impl.hh 2b5fbdcbfb5d > src/cpu/o3/iew_impl.hh 2b5fbdcbfb5d > > Diff: http://reviews.m5sim.org/r/343/diff > > > Testing > ------- > > > Thanks, > > Ali > >
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