changeset dac01f14f20f in /z/repo/m5
details: http://repo.m5sim.org/m5?cmd=changeset;node=dac01f14f20f
description:
Replace curTick global variable with accessor functions.
This step makes it easy to replace the accessor functions
(which still access a global variable) with ones that access
per-thread curTick values.
diffstat:
src/arch/alpha/isa/decoder.isa | 2 +-
src/arch/alpha/kernel_stats.cc | 4 +-
src/arch/alpha/tru64/process.cc | 2 +-
src/arch/arm/table_walker.cc | 2 +-
src/arch/mips/isa.cc | 4 +-
src/arch/mips/isa/formats/mt.isa | 4 +-
src/arch/mips/locked_mem.hh | 2 +-
src/arch/mips/mt.hh | 6 +-
src/arch/sparc/ua2005.cc | 10 +-
src/arch/x86/interrupts.cc | 8 +-
src/base/cp_annotate.cc | 12 +-
src/base/cp_annotate.hh | 2 +-
src/base/fast_alloc.cc | 4 +-
src/base/misc.cc | 4 +-
src/base/remote_gdb.cc | 4 +-
src/base/statistics.hh | 20 +++---
src/base/stats/mysql.cc | 2 +-
src/base/stats/output.cc | 6 +-
src/base/trace.hh | 10 +-
src/cpu/base.cc | 22 +++---
src/cpu/base.hh | 6 +-
src/cpu/checker/cpu.cc | 4 +-
src/cpu/checker/cpu_impl.hh | 18 ++--
src/cpu/inorder/cpu.cc | 28 ++++----
src/cpu/inorder/cpu.hh | 2 +-
src/cpu/inorder/inorder_dyn_inst.cc | 8 +-
src/cpu/inorder/pipeline_stage.cc | 10 +-
src/cpu/inorder/reg_dep_map.cc | 4 +-
src/cpu/inorder/resource.cc | 4 +-
src/cpu/inorder/resource_pool.9stage.cc | 20 +++---
src/cpu/inorder/resource_pool.cc | 16 ++--
src/cpu/inorder/resources/branch_predictor.cc | 4 +-
src/cpu/inorder/resources/cache_unit.cc | 8 +-
src/cpu/inorder/resources/execution_unit.cc | 6 +-
src/cpu/inorder/resources/fetch_seq_unit.cc | 4 +-
src/cpu/inorder/resources/graduation_unit.cc | 6 +-
src/cpu/inorder/resources/mult_div_unit.cc | 4 +-
src/cpu/o3/commit_impl.hh | 2 +-
src/cpu/o3/cpu.cc | 20 +++---
src/cpu/o3/cpu.hh | 12 +-
src/cpu/o3/fetch_impl.hh | 6 +-
src/cpu/o3/inst_queue_impl.hh | 2 +-
src/cpu/o3/lsq_impl.hh | 2 +-
src/cpu/o3/lsq_unit.hh | 2 +-
src/cpu/o3/lsq_unit_impl.hh | 2 +-
src/cpu/o3/thread_context_impl.hh | 6 +-
src/cpu/ozone/back_end.hh | 8 +-
src/cpu/ozone/cpu.hh | 4 +-
src/cpu/ozone/cpu_impl.hh | 4 +-
src/cpu/ozone/front_end_impl.hh | 6 +-
src/cpu/ozone/inorder_back_end.hh | 18 ++--
src/cpu/ozone/inst_queue_impl.hh | 2 +-
src/cpu/ozone/lsq_unit.hh | 8 +-
src/cpu/ozone/lsq_unit_impl.hh | 6 +-
src/cpu/ozone/lw_back_end_impl.hh | 4 +-
src/cpu/ozone/lw_lsq.hh | 2 +-
src/cpu/ozone/lw_lsq_impl.hh | 4 +-
src/cpu/pc_event.cc | 2 +-
src/cpu/simple/atomic.cc | 4 +-
src/cpu/simple/base.cc | 2 +-
src/cpu/simple/timing.cc | 40 ++++++------
src/cpu/simple_thread.cc | 6 +-
src/cpu/static_inst.cc | 2 +-
src/cpu/testers/directedtest/RubyDirectedTester.cc | 4 +-
src/cpu/testers/memtest/memtest.cc | 12 +-
src/cpu/testers/rubytest/Check.cc | 6 +-
src/cpu/testers/rubytest/RubyTester.cc | 2 +-
src/cpu/trace/trace_cpu.cc | 8 +-
src/dev/alpha/backdoor.cc | 2 +-
src/dev/arm/pl011.cc | 6 +-
src/dev/arm/pl111.cc | 12 +-
src/dev/arm/rv_ctrl.cc | 2 +-
src/dev/arm/timer_sp804.cc | 6 +-
src/dev/etherbus.cc | 4 +-
src/dev/etherdump.cc | 4 +-
src/dev/etherlink.cc | 4 +-
src/dev/ethertap.cc | 4 +-
src/dev/i8254xGBe.cc | 30 ++++----
src/dev/ide_disk.cc | 12 +-
src/dev/intel_8254_timer.cc | 6 +-
src/dev/io_device.cc | 14 ++--
src/dev/mc146818.cc | 16 ++--
src/dev/mc146818.hh | 2 +-
src/dev/ns_gige.cc | 30 ++++----
src/dev/sinic.cc | 26 +++---
src/dev/uart8250.cc | 14 ++--
src/kern/kernel_stats.cc | 4 +-
src/mem/bridge.cc | 10 +-
src/mem/bus.cc | 24 +++---
src/mem/cache/base.cc | 2 +-
src/mem/cache/base.hh | 4 +-
src/mem/cache/blk.hh | 2 +-
src/mem/cache/cache_impl.hh | 18 ++--
src/mem/cache/mshr.cc | 4 +-
src/mem/cache/mshr.hh | 2 +-
src/mem/cache/mshr_queue.hh | 2 +-
src/mem/cache/tags/fa_lru.cc | 2 +-
src/mem/cache/tags/iic.cc | 6 +-
src/mem/cache/tags/lru.cc | 8 +-
src/mem/dram.cc | 72 +++++++++++-----------
src/mem/mport.cc | 2 +-
src/mem/packet.hh | 6 +-
src/mem/request.hh | 8 +-
src/mem/ruby/eventqueue/RubyEventQueue.hh | 2 +-
src/mem/ruby/system/RubyPort.cc | 4 +-
src/mem/ruby/system/Sequencer.cc | 4 +-
src/mem/ruby/system/System.cc | 2 +-
src/mem/tport.cc | 8 +-
src/mem/tport.hh | 4 +-
src/python/m5/simulate.py | 2 +-
src/python/swig/core.i | 3 +-
src/python/swig/stats.i | 3 +-
src/sim/core.cc | 4 +-
src/sim/core.hh | 8 +-
src/sim/eventq.cc | 2 +-
src/sim/eventq.hh | 14 ++--
src/sim/init.cc | 2 +-
src/sim/pseudo_inst.cc | 16 ++--
src/sim/serialize.cc | 10 +-
src/sim/serialize.hh | 2 +-
src/sim/sim_events.cc | 2 +-
src/sim/sim_exit.hh | 4 +-
src/sim/sim_object.hh | 2 +-
src/sim/simulate.cc | 10 +-
src/sim/stat_control.cc | 6 +-
src/sim/stat_control.hh | 2 +-
src/sim/syscall_emul.cc | 4 +-
src/sim/syscall_emul.hh | 4 +-
src/unittest/stattest.cc | 40 ++++++------
129 files changed, 515 insertions(+), 509 deletions(-)
diffs (truncated from 4335 to 300 lines):
diff -r fc475ac7d2a4 -r dac01f14f20f src/arch/alpha/isa/decoder.isa
--- a/src/arch/alpha/isa/decoder.isa Fri Jan 07 21:50:29 2011 -0800
+++ b/src/arch/alpha/isa/decoder.isa Fri Jan 07 21:50:29 2011 -0800
@@ -791,7 +791,7 @@
Ra = xc->readMiscReg(IPR_CC) + (Rb & 0);
#else
- Ra = curTick;
+ Ra = curTick();
#endif
}}, IsUnverifiable);
diff -r fc475ac7d2a4 -r dac01f14f20f src/arch/alpha/kernel_stats.cc
--- a/src/arch/alpha/kernel_stats.cc Fri Jan 07 21:50:29 2011 -0800
+++ b/src/arch/alpha/kernel_stats.cc Fri Jan 07 21:50:29 2011 -0800
@@ -143,9 +143,9 @@
Linux::ThreadInfo(tc).curTaskPID());
_modeGood[newmode]++;
- _modeTicks[themode] += curTick - lastModeTick;
+ _modeTicks[themode] += curTick() - lastModeTick;
- lastModeTick = curTick;
+ lastModeTick = curTick();
themode = newmode;
}
diff -r fc475ac7d2a4 -r dac01f14f20f src/arch/alpha/tru64/process.cc
--- a/src/arch/alpha/tru64/process.cc Fri Jan 07 21:50:29 2011 -0800
+++ b/src/arch/alpha/tru64/process.cc Fri Jan 07 21:50:29 2011 -0800
@@ -184,7 +184,7 @@
TypedBufferArg<Tru64::tbl_sysinfo> elp(bufPtr);
const int clk_hz = one_million;
- elp->si_user = htog(curTick / (SimClock::Frequency / clk_hz));
+ elp->si_user = htog(curTick() / (SimClock::Frequency / clk_hz));
elp->si_nice = htog(0);
elp->si_sys = htog(0);
elp->si_idle = htog(0);
diff -r fc475ac7d2a4 -r dac01f14f20f src/arch/arm/table_walker.cc
--- a/src/arch/arm/table_walker.cc Fri Jan 07 21:50:29 2011 -0800
+++ b/src/arch/arm/table_walker.cc Fri Jan 07 21:50:29 2011 -0800
@@ -713,7 +713,7 @@
TableWalker::nextWalk(ThreadContext *tc)
{
if (pendingQueue.size())
- schedule(doProcessEvent, tc->getCpuPtr()->nextCycle(curTick+1));
+ schedule(doProcessEvent, tc->getCpuPtr()->nextCycle(curTick()+1));
}
diff -r fc475ac7d2a4 -r dac01f14f20f src/arch/mips/isa.cc
--- a/src/arch/mips/isa.cc Fri Jan 07 21:50:29 2011 -0800
+++ b/src/arch/mips/isa.cc Fri Jan 07 21:50:29 2011 -0800
@@ -528,7 +528,7 @@
//schedule UPDATE
CP0Event *cp0_event = new CP0Event(this, cpu, UpdateCP0);
- cpu->schedule(cp0_event, curTick + cpu->ticks(delay));
+ cpu->schedule(cp0_event, curTick() + cpu->ticks(delay));
}
}
@@ -585,7 +585,7 @@
void
ISA::CP0Event::scheduleEvent(int delay)
{
- cpu->reschedule(this, curTick + cpu->ticks(delay), true);
+ cpu->reschedule(this, curTick() + cpu->ticks(delay), true);
}
void
diff -r fc475ac7d2a4 -r dac01f14f20f src/arch/mips/isa/formats/mt.isa
--- a/src/arch/mips/isa/formats/mt.isa Fri Jan 07 21:50:29 2011 -0800
+++ b/src/arch/mips/isa/formats/mt.isa Fri Jan 07 21:50:29 2011 -0800
@@ -201,7 +201,7 @@
def format MT_MFTR(code, *flags) {{
flags += ('IsNonSpeculative', )
-# code = 'std::cerr << curTick << \": T\" << xc->tcBase()->threadId()
<< \": Executing MT INST: ' + name + '\" << endl;\n' + code
+# code = 'std::cerr << curTick() << \": T\" << xc->tcBase()->threadId()
<< \": Executing MT INST: ' + name + '\" << endl;\n' + code
code += 'if (MT_H == 1) {\n'
code += 'data = bits(data, top_bit, bottom_bit);\n'
@@ -217,7 +217,7 @@
def format MT_MTTR(code, *flags) {{
flags += ('IsNonSpeculative', )
-# code = 'std::cerr << curTick << \": T\" << xc->tcBase()->threadId()
<< \": Executing MT INST: ' + name + '\" << endl;\n' + code
+# code = 'std::cerr << curTick() << \": T\" << xc->tcBase()->threadId()
<< \": Executing MT INST: ' + name + '\" << endl;\n' + code
iop = InstObjParams(name, Name, 'MTOp', code, flags)
header_output = BasicDeclare.subst(iop)
decoder_output = BasicConstructor.subst(iop)
diff -r fc475ac7d2a4 -r dac01f14f20f src/arch/mips/locked_mem.hh
--- a/src/arch/mips/locked_mem.hh Fri Jan 07 21:50:29 2011 -0800
+++ b/src/arch/mips/locked_mem.hh Fri Jan 07 21:50:29 2011 -0800
@@ -85,7 +85,7 @@
if (stCondFailures % 100000 == 0) {
warn("%i: context %d: %d consecutive "
"store conditional failures\n",
- curTick, xc->contextId(), stCondFailures);
+ curTick(), xc->contextId(), stCondFailures);
}
if (!lock_flag){
diff -r fc475ac7d2a4 -r dac01f14f20f src/arch/mips/mt.hh
--- a/src/arch/mips/mt.hh Fri Jan 07 21:50:29 2011 -0800
+++ b/src/arch/mips/mt.hh Fri Jan 07 21:50:29 2011 -0800
@@ -81,7 +81,7 @@
tc->setMiscReg(MISCREG_TC_RESTART, pc.npc());
warn("%i: Halting thread %i in %s @ PC %x, setting restart PC to %x",
- curTick, tc->threadId(), tc->getCpuPtr()->name(),
+ curTick(), tc->threadId(), tc->getCpuPtr()->name(),
pc.pc(), pc.npc());
}
}
@@ -99,7 +99,7 @@
tc->activate(0);
warn("%i: Restoring thread %i in %s @ PC %x",
- curTick, tc->threadId(), tc->getCpuPtr()->name(), restartPC);
+ curTick(), tc->threadId(), tc->getCpuPtr()->name(), restartPC);
}
}
@@ -208,7 +208,7 @@
tcStatus.a = 0;
tc->setMiscReg(MISCREG_TC_STATUS, tcStatus);
warn("%i: Deactivating Hardware Thread Context #%i",
- curTick, tc->threadId());
+ curTick(), tc->threadId());
}
} else if (src_reg > 0) {
if (src_reg && !yield_mask != 0) {
diff -r fc475ac7d2a4 -r dac01f14f20f src/arch/sparc/ua2005.cc
--- a/src/arch/sparc/ua2005.cc Fri Jan 07 21:50:29 2011 -0800
+++ b/src/arch/sparc/ua2005.cc Fri Jan 07 21:50:29 2011 -0800
@@ -111,7 +111,7 @@
if (!(tick_cmpr & ~mask(63)) && time > 0) {
if (tickCompare->scheduled())
cpu->deschedule(tickCompare);
- cpu->schedule(tickCompare, curTick + time * cpu->ticks(1));
+ cpu->schedule(tickCompare, curTick() + time * cpu->ticks(1));
}
panic("writing to TICK compare register %#X\n", val);
break;
@@ -127,7 +127,7 @@
if (!(stick_cmpr & ~mask(63)) && time > 0) {
if (sTickCompare->scheduled())
cpu->deschedule(sTickCompare);
- cpu->schedule(sTickCompare, curTick + time * cpu->ticks(1));
+ cpu->schedule(sTickCompare, curTick() + time * cpu->ticks(1));
}
DPRINTF(Timer, "writing to sTICK compare register value %#X\n", val);
break;
@@ -197,7 +197,7 @@
if (!(hstick_cmpr & ~mask(63)) && time > 0) {
if (hSTickCompare->scheduled())
cpu->deschedule(hSTickCompare);
- cpu->schedule(hSTickCompare, curTick + time * cpu->ticks(1));
+ cpu->schedule(hSTickCompare, curTick() + time * cpu->ticks(1));
}
DPRINTF(Timer, "writing to hsTICK compare register value %#X\n", val);
break;
@@ -335,7 +335,7 @@
setMiscReg(MISCREG_SOFTINT, softint | (ULL(1) << 16), tc);
}
} else {
- cpu->schedule(sTickCompare, curTick + ticks * cpu->ticks(1));
+ cpu->schedule(sTickCompare, curTick() + ticks * cpu->ticks(1));
}
}
@@ -363,7 +363,7 @@
}
// Need to do something to cause interrupt to happen here !!! @todo
} else {
- cpu->schedule(hSTickCompare, curTick + ticks * cpu->ticks(1));
+ cpu->schedule(hSTickCompare, curTick() + ticks * cpu->ticks(1));
}
}
diff -r fc475ac7d2a4 -r dac01f14f20f src/arch/x86/interrupts.cc
--- a/src/arch/x86/interrupts.cc Fri Jan 07 21:50:29 2011 -0800
+++ b/src/arch/x86/interrupts.cc Fri Jan 07 21:50:29 2011 -0800
@@ -394,7 +394,7 @@
uint64_t ticksPerCount = clock *
divideFromConf(regs[APIC_DIVIDE_CONFIGURATION]);
// Compute how many m5 ticks are left.
- uint64_t val = apicTimerEvent.when() - curTick;
+ uint64_t val = apicTimerEvent.when() - curTick();
// Turn that into a count.
val = (val + ticksPerCount - 1) / ticksPerCount;
return val;
@@ -572,13 +572,13 @@
uint64_t newCount = newVal *
(divideFromConf(regs[APIC_DIVIDE_CONFIGURATION]));
// Schedule on the edge of the next tick plus the new count.
- Tick offset = curTick % clock;
+ Tick offset = curTick() % clock;
if (offset) {
reschedule(apicTimerEvent,
- curTick + (newCount + 1) * clock - offset, true);
+ curTick() + (newCount + 1) * clock - offset, true);
} else {
reschedule(apicTimerEvent,
- curTick + newCount * clock, true);
+ curTick() + newCount * clock, true);
}
}
break;
diff -r fc475ac7d2a4 -r dac01f14f20f src/base/cp_annotate.cc
--- a/src/base/cp_annotate.cc Fri Jan 07 21:50:29 2011 -0800
+++ b/src/base/cp_annotate.cc Fri Jan 07 21:50:29 2011 -0800
@@ -161,7 +161,7 @@
StringWrap name(sys->name());
if (!sm[0])
- warn("Got null SM at tick %d\n", curTick);
+ warn("Got null SM at tick %d\n", curTick());
int sysi = getSys(sys);
int smi = getSm(sysi, sm, args[1]);
@@ -273,7 +273,7 @@
DPRINTF(Annotate, "Ending machine: %s; end stack: %s\n", sm,
smMap[smib-1].second.first);
- warn("State machine stack not unwinding correctly at %d\n", curTick);
+ warn("State machine stack not unwinding correctly at %d\n", curTick());
} else {
DPRINTF(Annotate,
"State machine ending:%s sysi:%d id:%#x back:%d getSm:%d\n",
@@ -316,7 +316,7 @@
DPRINTF(Annotate, "Explict begin of state %s\n", st);
uint32_t flags = args[0];
if (flags & FL_BAD)
- warn("BAD state encountered: at cycle %d: %s\n", curTick, st);
+ warn("BAD state encountered: at cycle %d: %s\n", curTick(), st);
swBegin(tc->getSystemPtr(), tc->contextId(), st, getFrame(tc), true,
args[0]);
}
@@ -688,10 +688,10 @@
warn("%d: Queue Assert: SW said there should be %d byte(s) in %s,"
"however there are %d byte(s)\n",
- curTick, size, q, qBytes[qi-1]);
+ curTick(), size, q, qBytes[qi-1]);
DPRINTF(AnnotateQ, "%d: Queue Assert: SW said there should be %d"
" byte(s) in %s, however there are %d byte(s)\n",
- curTick, size, q, qBytes[qi-1]);
+ curTick(), size, q, qBytes[qi-1]);
}
}
@@ -813,7 +813,7 @@
CPA::add(int t, int f, int c, int sm, int stq, int32_t d)
{
AnnDataPtr an = new AnnotateData;
- an->time = curTick;
+ an->time = curTick();
an->data = d;
an->orig_data = d;
an->op = t;
diff -r fc475ac7d2a4 -r dac01f14f20f src/base/cp_annotate.hh
--- a/src/base/cp_annotate.hh Fri Jan 07 21:50:29 2011 -0800
+++ b/src/base/cp_annotate.hh Fri Jan 07 21:50:29 2011 -0800
@@ -408,7 +408,7 @@
int smi = getSm(sysi, sm, frame);
add(OP_BEGIN, FL_HW | f, 0, smi, getSt(sm, st));
if (f & FL_BAD)
- warn("BAD state encountered: at cycle %d: %s\n", curTick, st);
+ warn("BAD state encountered: at cycle %d: %s\n", curTick(), st);
}
inline void hwQ(flags f, System *sys, uint64_t frame, std::string sm,
diff -r fc475ac7d2a4 -r dac01f14f20f src/base/fast_alloc.cc
--- a/src/base/fast_alloc.cc Fri Jan 07 21:50:29 2011 -0800
+++ b/src/base/fast_alloc.cc Fri Jan 07 21:50:29 2011 -0800
@@ -80,7 +80,7 @@
#include <typeinfo>
#include "base/cprintf.hh"
-#include "sim/core.hh" // for curTick
+#include "sim/core.hh" // for curTick()
using namespace std;
@@ -104,7 +104,7 @@
{
// mark this object in use
inUse = true;
- whenAllocated = curTick;
+ whenAllocated = curTick();
// update count
++numInUse;
diff -r fc475ac7d2a4 -r dac01f14f20f src/base/misc.cc
--- a/src/base/misc.cc Fri Jan 07 21:50:29 2011 -0800
+++ b/src/base/misc.cc Fri Jan 07 21:50:29 2011 -0800
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