changeset b41fff98bffe in /z/repo/m5
details: http://repo.m5sim.org/m5?cmd=changeset;node=b41fff98bffe
description:
Change addressing in interrupt code to meet physical addressing
requirements
diffstat:
system/alpha/palcode/platform_m5.s | 8 ++++----
1 files changed, 4 insertions(+), 4 deletions(-)
diffs (34 lines):
diff -r aa8dbafcb3b6 -r b41fff98bffe system/alpha/palcode/platform_m5.s
--- a/system/alpha/palcode/platform_m5.s Sun Feb 15 22:31:19 2004 -0500
+++ b/system/alpha/palcode/platform_m5.s Thu Feb 19 16:33:36 2004 -0500
@@ -754,7 +754,7 @@
ALIGN_BRANCH
sys_int_22:
or r31,1,r16 // a0 means it is a I/O
interrupt
- lda r8,0x101(r31)
+ lda r8,0xf01(r31)
sll r8,16,r8
lda r8,0xa000(r8)
sll r8,16,r8
@@ -766,7 +766,7 @@
ALIGN_BRANCH
-sys_int_21:
+sys_int_20:
Read_TLINTRSUMx(r13,r10,r14) // read the right TLINTRSUMx
srl r13, 12, r13 // shift down to examine IPL15
@@ -795,10 +795,10 @@
ALIGN_BRANCH
-sys_int_20:
+sys_int_21:
or r31,3,r16 // a0 means it is a I/O
interrupt
- lda r8,0x0801(r31)
+ lda r8,0xf01(r31)
sll r8,32,r8
ldah r9,0xa0(r31)
sll r9,8,r9
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