changeset f89e2d31764c in /z/repo/m5
details: http://repo.m5sim.org/m5?cmd=changeset;node=f89e2d31764c
description:
Deleted a whole bunch of files that we didn't nede in the header
directory
console/dbmentry.s:
console/printf.c:
removed unneeded includes
diffstat:
system/alpha/console/dbmentry.s | 6 +-
system/alpha/console/printf.c | 2 +-
system/alpha/h/DEC21040.h | 409 ---------------------
system/alpha/h/Makefile | 20 -
system/alpha/h/address.h | 121 ------
system/alpha/h/am79c960.h | 381 --------------------
system/alpha/h/arp.h | 108 -----
system/alpha/h/base.h | 78 ----
system/alpha/h/bbram.h | 101 -----
system/alpha/h/bootp.h | 89 ----
system/alpha/h/bptable.h | 111 -----
system/alpha/h/buffer.h | 70 ---
system/alpha/h/eb164mem.h | 71 ---
system/alpha/h/eb64.h | 180 ---------
system/alpha/h/eb64l.h | 66 ---
system/alpha/h/eb64mem.h | 73 ---
system/alpha/h/eb64p.h | 265 -------------
system/alpha/h/eb64pmem.h | 77 ----
system/alpha/h/eb66.h | 257 -------------
system/alpha/h/eb66mem.h | 75 ---
system/alpha/h/eb66p.h | 66 ---
system/alpha/h/edevice.h | 249 -------------
system/alpha/h/ether.h | 96 -----
system/alpha/h/ethernet.h | 218 -----------
system/alpha/h/ev4.h | 704 -------------------------------------
system/alpha/h/fat.h | 88 ----
system/alpha/h/flash.h | 101 -----
system/alpha/h/floppy.h | 171 ---------
system/alpha/h/fregs.h | 80 ----
system/alpha/h/ip.h | 192 ----------
system/alpha/h/isa_buff.h | 72 ---
system/alpha/h/k_extra.h | 89 ----
system/alpha/h/kbdscan.h | 86 ----
system/alpha/h/kernel.h | 278 --------------
system/alpha/h/ladbx.h | 74 ---
system/alpha/h/ladbxapp.h | 56 --
system/alpha/h/ledcodes.h | 62 ---
system/alpha/h/libc.h | 204 ----------
system/alpha/h/local.h | 58 ---
system/alpha/h/mem.h | 54 --
system/alpha/h/mon.h | 158 --------
system/alpha/h/net_buff.h | 75 ---
system/alpha/h/netman.h | 79 ----
system/alpha/h/paldefs.h | 76 ----
system/alpha/h/pci.h | 203 ----------
system/alpha/h/ppec.h | 33 -
system/alpha/h/prtrace.h | 99 -----
system/alpha/h/rom.h | 53 --
system/alpha/h/romhead.h | 354 ------------------
system/alpha/h/server_t.h | 61 ---
system/alpha/h/ssb.h | 183 ---------
system/alpha/h/sys.h | 253 -------------
system/alpha/h/system.h | 89 ----
system/alpha/h/tftp.h | 87 ----
system/alpha/h/tga.h | 716 -------------------------------------
system/alpha/h/tga_crystal.h | 760 ----------------------------------------
system/alpha/h/uart.h | 108 -----
system/alpha/h/udp.h | 197 ----------
system/alpha/h/wga.h | 160 --------
system/alpha/h/xlate.h | 80 ----
system/alpha/h/xxm.h | 233 ------------
system/alpha/h/xxmmem.h | 60 ---
62 files changed, 4 insertions(+), 9671 deletions(-)
diffs (truncated from 9936 to 300 lines):
diff -r fa217136aff1 -r f89e2d31764c system/alpha/console/dbmentry.s
--- a/system/alpha/console/dbmentry.s Mon May 17 17:49:47 2004 -0400
+++ b/system/alpha/console/dbmentry.s Mon May 17 19:23:48 2004 -0400
@@ -18,10 +18,10 @@
#include "osf.h"
#endif
-#include "paldefs.h"
+//#include "paldefs.h"
#include "regdefs.h"
-#include "system.h"
-#include "ledcodes.h"
+#include "eb164.h"
+//#include "ledcodes.h"
.text
diff -r fa217136aff1 -r f89e2d31764c system/alpha/console/printf.c
--- a/system/alpha/console/printf.c Mon May 17 17:49:47 2004 -0400
+++ b/system/alpha/console/printf.c Mon May 17 19:23:48 2004 -0400
@@ -70,7 +70,7 @@
Sun Feb 10 20:18:22 1985
*/
-#include "system.h"
+//#include "system.h"
#include "lib.h"
#include <stdarg.h>
diff -r fa217136aff1 -r f89e2d31764c system/alpha/h/DEC21040.h
--- a/system/alpha/h/DEC21040.h Mon May 17 17:49:47 2004 -0400
+++ /dev/null Thu Jan 01 00:00:00 1970 +0000
@@ -1,409 +0,0 @@
-#ifndef __DECCHIP21040_H_LOADED
-#define __DECCHIP21040_H_LOADED
-/*****************************************************************************
-
- Copyright © 1993, 1994 Digital Equipment Corporation,
- Maynard, Massachusetts.
-
- All Rights Reserved
-
-Permission to use, copy, modify, and distribute this software and its
-documentation for any purpose and without fee is hereby granted, provided
-that the copyright notice and this permission notice appear in all copies
-of software and supporting documentation, and that the name of Digital not
-be used in advertising or publicity pertaining to distribution of the software
-without specific, written prior permission. Digital grants this permission
-provided that you prominently mark, as not part of the original, any
-modifications made to this software or documentation.
-
-Digital Equipment Corporation disclaims all warranties and/or guarantees
-with regard to this software, including all implied warranties of fitness for
-a particular purpose and merchantability, and makes no representations
-regarding the use of, or the results of the use of, the software and
-documentation in terms of correctness, accuracy, reliability, currentness or
-otherwise; and you rely on the software, documentation and results solely at
-your own risk.
-
-******************************************************************************/
-
-/*
- * $Id: DEC21040.h,v 1.1.1.1 1997/10/30 23:27:13 verghese Exp $
- */
-
-/*
- * MODULE DESCRIPTION:
- *
- * Parameters and logicals for AM79C960 drivers in EB64 monitor
- *
- * HISTORY:
- *
- * $Log:
- *
- */
-
-#ifdef NEEDPCI
-
-#include "pci.h"
-
-/* The embedded Ethernet controller on the EB66 and EB64+ is a
- * DECchip 21040 PCI device.
- *
- * Please see the PCI and DECchip 21040 literature for definitive lists
- * and further detail.
- *
- */
-
-
-/*****************************************************************************
- * General *
- *****************************************************************************/
-
-/*
- * Maximum number of DECchip 21040s supported in the EB66 and
- * 64+ monitors. This is assuming 1 embedded device and 2 PCI
- * slots. Of course this changes if a bridge card is used.
- */
-
-#define DECCHIP21040_MAX_DEVICES 3
-
-/*****************************************************************************
- * ROM ID *
- *****************************************************************************/
-/*
- * As the ROM ID is only used by the DECchip 21040, then this information
- * can go here. Note that this information is the same for both EB66
- * and EB64P.
- *
- * To read this device you must first write which page you want
- * into the PAGE_REGISTER. The bit settings look like:
- *
- * SxxA AAAA
- *
- * Where S = 0 = BBRAM, S = 1 = Ethernet ID ROM.
- *
- * A AAAA select the high order address lines of the BBRAM
- * and are ignored for the Ethernet ID ROM.
- */
-#define PAGE_REGISTER 0xc00
-#define SELECT_ROMID 0x80
-#define ROMID_BASE 0x800
-
-/*****************************************************************************
- * CSRs, these exist in PCI I/O space *
- *****************************************************************************/
-/*
- * CSR offsets.
- */
-
-#define CSR0 0x0000 /* Bus Mode Register */
-#define CSR1 0x0008 /* Transmit Poll Demand */
-#define CSR2 0x0010 /* Receive Poll Demand */
-#define CSR3 0x0018 /* Rx Ring Base Address */
-#define CSR4 0x0020 /* Tx Ring Base Address */
-#define CSR5 0x0028 /* Status Register */
-#define CSR6 0x0030 /* Serial command register */
-#define CSR7 0x0038 /* Interrupt Mask register */
-#define CSR8 0x0040 /* Missed Frame counter */
-#define CSR9 0x0048 /* ENET ROM register */
-#define CSR10 0x0050 /* Data Diagnostic register */
-#define CSR11 0x0058 /* Full duplex register */
-#define CSR12 0x0060 /* SIA Status register */
-#define CSR13 0x0068 /* SIA connectivity register */
-#define CSR14 0x0070 /* SIA Tx Rx Register */
-#define CSR15 0x0078 /* SIA General register */
-
-#define TDES1_ADD 0x0088
-#define RDES1_ADD 0x00B8
-#define PCI_DIAG 0x0178
-
-/*
- * CSR bit definitions (see the DECchip 21040 manual for details).
- */
-#define CSR0_CAL 0x0000C000 /* 15:14 Cache alignment */
-#define CSR0_PBL 0x00003F00 /* 13:18 Programmable burst length */
-#define CSR0_BLE 0x00000080 /* Big/Little endian */
-#define CSR0_DSL 0x0000007C /* Descriptor Skip Length */
-#define CSR0_BAR 0x00000020 /* Bus Arbitration */
-#define CSR0_SWR 0x00000001 /* Software Reset */
-
-#define CSR1_TPD 0x00000001 /* Transmit Poll Demand */
-
-#define CSR2_RPD 0x00000001 /* Receive Poll Demand */
-
-#define CSR3_RXB 0xFFFFFFFC /* Rx ring base address */
-
-#define CSR4_TXB 0xFFFFFFFC /* Tx ring base address */
-
-#define CSR5_EB 0x03800000 /* 25:23 Error Bits */
-#define CSR5_TS 0x00700000 /* 22:20 Transmission Process State */
-#define CSR5_RS 0x000E0000 /* 19:17 Receive Process State */
-#define CSR5_NIS 0x00010000 /* Normal interrupt Summary */
-#define CSR5_AIS 0x00008000 /* Abnormal interrupt Summary */
-#define CSR5_SE 0x00002000 /* System Error */
-#define CSR5_LNF 0x00001000 /* link fail */
-#define CSR5_FD 0x00000800 /* Full duplex short frame received */
-#define CSR5_AT 0x00000400 /* AUI/TP switch */
-#define CSR5_RWT 0x00000200 /* Receive watchdog time-out */
-#define CSR5_RPS 0x00000100 /* Receive process stopped */
-#define CSR5_RU 0x00000080 /* Receive buffer unavailable */
-#define CSR5_RI 0x00000040 /* Receive Interrupt */
-#define CSR5_UNF 0x00000020 /* Transmit underflow */
-#define CSR5_TJT 0x00000008 /* Transmit jabber timeout */
-#define CSR5_TU 0x00000004 /* Transmit buffer unavailable */
-#define CSR5_TPS 0x00000002 /* Transmit process stopped */
-#define CSR5_TI 0x00000001 /* Transmit interrupt */
-
-#define CSR5_TS_SUSPENDED 0x00600000 /* 110: Transmit process suspended */
-#define CSR5_RS_SUSPENDED 0x00080000 /* 100: Receive process suspended */
-
-#define CSR6_TR 0x0000C000 /* 15:14 Threshold control bits */
-#define CSR6_ST 0x00002000 /* Start/stop transmission */
-#define CSR6_FC 0x00001000 /* Force collision mode */
-#define CSR6_OM 0x00000C00 /* 11:10 Operating Mode */
-#define CSR6_FD 0x00000200 /* Full duplex operating mode */
-#define CSR6_FKD 0x00000100 /* Flaky oscillator disable */
-#define CSR6_PM 0x00000080 /* Pass All Multicast */
-#define CSR6_PR 0x00000040 /* Promiscuous mode */
-#define CSR6_SB 0x00000020 /* Start/Stop Backoff counter */
-#define CSR6_IF 0x00000010 /* Inverse filtering */
-#define CSR6_PB 0x00000008 /* Pass Bad frames */
-#define CSR6_SR 0x00000002 /* Start/Stop Receive */
-#define CSR6_HP 0x00000001 /* Hash/Perfect receive filtering mode
- */
-
-#define CSR7_NIM 0x00010000 /* Normal interrupt summary mask */
-#define CSR7_AIM 0x00008000 /* Abnormal interrupt summary mask */
-#define CSR7_SEM 0x00002000 /* System Error Mask */
-#define CSR7_LFM 0x00001000 /* Link fail mask */
-#define CSR7_FDM 0x00000800 /* Full Duplex mask */
-#define CSR7_ATM 0x00000400 /* AUI/TP switch mask */
-#define CSR7_RWM 0x00000200 /* Receive watchdog timeout mask */
-#define CSR7_RSM 0x00000100 /* Receive stopped mask */
-#define CSR7_RUM 0x00000080 /* Receive buffer unavailable mask */
-#define CSR7_RIM 0x00000040 /* Receive interrupt mask */
-#define CSR7_UNM 0x00000020 /* Underflow interrupt mask */
-#define CSR7_TJM 0x00000008 /* transmit jabber timeout mask */
-#define CSR7_TUM 0x00000004 /* transmit buffer unavailable mask */
-#define CSR7_TSM 0x00000002 /* transmission stopped mask */
-#define CSR7_TIM 0x00000001 /* transmit interrupt mask */
-
-#define CSR8_MFO 0x00010000 /* Missed frame overflow */
-#define CSR8_MFC 0x0000FFFF /* Missed frame counter */
-
-#define CSR9_DT 0x000000FF /* 7:0 Data */
-#define CSR9_DN 0x80000000 /* 31 Data not valid, 0 = valid */
-
-#define CSR11_FD 0x0000FFFF /* 15:0 Full duplex auto configuration
- * value */
-#define CSR12_PAUI 0x00000001
-#define CSR12_NCR 0x00000002
-#define CSR12_LKF 0x00000004
-
-/*
- * CSR13 - SIA programming.
- */
-#define CSR13_SRL 0x00000001 /* SIA Reset r/w */
-#define CSR13_PS 0x00000002 /* Pin AUI/TP Selection r/w */
-#define CSR13_CAC 0x00000004 /* CSR Auto Configuration */
-#define CSR13_AUI 0x00000008 /* 10 Base T or AUI */
-#define CSR13_EDP 0x00000010 /* SIA PLL external input enable */
-#define CSR13_ENI 0x00000020 /* Encoder Input Mux */
-#define CSR13_SIM 0x00000040 /* Serial Interface Input Mux */
-
-/*****************************************************************************
- * Macros *
- *****************************************************************************/
-#define _21040WriteCSR(device,csr,value) \
- (outportl((device)->PCI_IO_Base + (csr), (value)))
-
-#define _21040ReadCSR(device,csr) \
- (inportl((device)->PCI_IO_Base + (csr)))
-
-#define _21040ValidBuffer(buffer,size) \
- ( \
- (((unsigned long)(buffer) & 0x3) == 0) \
- && \
- ((unsigned long)(buffer) <= 0xFFFFFFFF) \
- && \
- (PCIValidAddress((unsigned char *) (buffer))) \
- && \
- (PCIValidAddress((unsigned char *) (buffer) + (size))) \
- )
-
-/*****************************************************************************
- * PCI Constants *
- *****************************************************************************/
-/*
- * The configuration registers for DECchip 21040 exist in PCI configuration
- * space. The definitions for the standard fields are in pci.h, these
- * definitions are 21040 specific.
- */
-#define CFID 0x0000 /* Configuration ID */
-#define CFCS 0x0004 /* Configuration command/status
*/
-#define CFRV 0x0008 /* Configuration revision */
-#define CFLT 0x000C /* Configuration latency timer
*/
-#define CBIO 0x0010 /* Configuration base IO
address */
-
-#define CBIO_MIO 0x00000001 /* Memory I/O. 1 = I/O. */
-#define CSR_SIZE 0x400 /* you can work this out by writing
- all F's to CBIO */
-
-/*****************************************************************************
- * Setup Frame, if needed *
- *****************************************************************************/
-#define SETUP_FRAME_NEEDED 1 /* Do we need a setup frame? */
-#define SETUP_FRAME_SIZE 192
-#define SETUP_PHYSICAL_ADDRESS_OFFSET 156
-#define SETUP_HASH_FILTER_SIZE 128
-/*****************************************************************************
- * Data Structures *
- *****************************************************************************/
-/*
- * TX descriptor. Must be longword aligned in memory.
- */
-typedef struct {
- union {
- unsigned int tdes0;
- struct {
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