changeset 9d6c5bc4e1f9 in /z/repo/m5
details: http://repo.m5sim.org/m5?cmd=changeset;node=9d6c5bc4e1f9
description:
Added ALPHA_ACCESS_BASE to get rid of machine_defs.h
diffstat:
system/alpha/console/console.c | 14 +-
system/alpha/h/machine_defs.h | 635 -----------------------------------------
2 files changed, 6 insertions(+), 643 deletions(-)
diffs (truncated from 705 to 300 lines):
diff -r 916491cca643 -r 9d6c5bc4e1f9 system/alpha/console/console.c
--- a/system/alpha/console/console.c Tue May 18 16:32:59 2004 -0400
+++ b/system/alpha/console/console.c Tue May 18 20:11:58 2004 -0400
@@ -15,7 +15,6 @@
#define CONSOLE
#include "alpha_access.h"
-#include "machine_defs.h"
#if 0
#include "new_aouthdr.h"
@@ -34,8 +33,7 @@
#define K1BASE 0xfffffc8000000000
#define KSEG_TO_PHYS(x)(((ul)x) & ~KSEG)
-#define CDR ((volatile DevConsoleRegisters *) \
- (__MAGIC_ZONE(0, 0, MAGIC_ZONE_BDOOR_DEV) +
__MAGIC_BDOOR_CNSLE_OFFS))
+#define ALPHA_ACCESS_BASE 0xfffffc8000a00000
#define PHYS_TO_K1(_x) (K1BASE|(_x))
@@ -118,7 +116,7 @@
char GetChar()
{
- struct AlphaAccess *k1Conf = (struct AlphaAccess *)(__MAGIC_ZONE(0, 0,
MAGIC_ZONE_EV5_ALIAS));
+ struct AlphaAccess *k1Conf = (struct AlphaAccess *)(ALPHA_ACCESS_BASE);
return k1Conf->inputChar;
}
@@ -130,7 +128,7 @@
#if 0
*(int*) PHYS_TO_K1(SLOT_D_COM1<<5) = c;
#endif
- struct AlphaAccess *k1Conf = (struct AlphaAccess *)(__MAGIC_ZONE(0, 0,
MAGIC_ZONE_EV5_ALIAS));
+ struct AlphaAccess *k1Conf = (struct AlphaAccess *)(ALPHA_ACCESS_BASE);
k1Conf->outputChar = c;
}
@@ -144,7 +142,7 @@
main(int argc, char **argv)
{
int x,i;
- struct AlphaAccess *k1Conf = (struct AlphaAccess *)(__MAGIC_ZONE(0, 0,
MAGIC_ZONE_EV5_ALIAS));
+ struct AlphaAccess *k1Conf = (struct AlphaAccess *)(ALPHA_ACCESS_BASE);
ui *k1ptr,*ksegptr;
@@ -828,7 +826,7 @@
int i;
for (i=1;i<simosConf.numCPUs;i++) {
volatile struct AlphaAccess *k1Conf = (volatile struct AlphaAccess *)
- (__MAGIC_ZONE(0, 0, MAGIC_ZONE_EV5_ALIAS));
+ (ALPHA_ACCESS_BASE);
SpinLock(&theLock);
printf("Bootstraping CPU %d with sp=0x%x \n",
i,bootStrapImpure[i]);
@@ -970,7 +968,7 @@
DeviceOperation(long op, long channel, long count, long address, long block)
{
struct AlphaAccess *k1Conf = (struct AlphaAccess *)
- (__MAGIC_ZONE(0, 0, MAGIC_ZONE_EV5_ALIAS));
+ (ALPHA_ACCESS_BASE);
long pAddr;
diff -r 916491cca643 -r 9d6c5bc4e1f9 system/alpha/h/machine_defs.h
--- a/system/alpha/h/machine_defs.h Tue May 18 16:32:59 2004 -0400
+++ /dev/null Thu Jan 01 00:00:00 1970 +0000
@@ -1,635 +0,0 @@
-/*
- * Copyright (C) 1998 by the Board of Trustees
- * of Leland Stanford Junior University.
- * Copyright (C) 1998 Digital Equipment Corporation
- *
- * This file is part of the SimOS distribution.
- * See LICENSE file for terms of the license.
- *
- */
-
- /***********************************************************************
-
- machine_defs.h
-
- ***********************************************************************/
-
- /*************************************************************************
- * *
- * Copyright (C) 1993-1996 Stanford University *
- * *
- * These coded instructions, statements, and computer programs contain *
- * unpublished proprietary information of Stanford University, and *
- * are protected by Federal copyright law. They may not be disclosed *
- * to third parties or copied or duplicated in any form, in whole or *
- * in part, without the prior written consent of Stanford University. *
- * *
- *************************************************************************/
-
-#ifndef __DPGCC__
-#ifndef _HEADER_STACK_
-#define _HEADER_STACK_
-#endif
-#endif
-
-#ifndef _MACHINE_DEFS_H
-#define _MACHINE_DEFS_H
-
-/*
- * Created by: Dan Teodosiu, 07/96
- *
- * This header file defines the OS view of the MAGIC service address space
- * and of the device registers.
- *
- * The service address space addresses used by the OS are VIRTUAL addresses.
- * Depending on whether we simulate a 32 bit or a 64 bit processor,
- * the service address mappings will be different. MAGIC physical addresses
- * are 40 bits wide, so in 32 bit mode (current SimOS) we had to squeeze
- * the service address space into less address bits.
- *
- * There are two kinds of macros in this file:
- *
- * - MAGIC definitions, pertaining to the services offered by the
- * MAGIC node controller. All these macros start with MAGIC_...,
- * Those definitions are further subdivided into ones which do not
- * depend on the address mappings (such as MAGIC register numbers,
- * error codes, etc.), and ones which do (such as the macros that help
- * construct MAGIC PPR addresses).
- * The current simulated MAGIC only supports doubleword accesses.
- *
- * - devices register definitions, of the form DEV_... These defs
- * describe the various device registers. Devices are accessed by
- * performing uncached word (32bit) reads and writes to their registers.
- *
- * Notes:
- * The macro SIMOS64BIT selects the 64 bit version of those definitions;
- * by default, you get the 32 bit version. 64 bit is currently not
- * implemented.
- *
- * Related documents:
- * - FLASH: Physical Address Layout
- * - FLASH: PP Software Services
- * - SimOS to FLASH Physical Address Mapping
- *
- */
-
-
-/***************************************************************************
- MAGIC defs which do not depend on the virtual -> physical address mapping
- ***************************************************************************/
-
-/** zone numbering for service address space **/
-
-#define MAGIC_ZONE_FRAM_ALIAS 0
-#define MAGIC_ZONE_PPR_ALIAS 1
-#define MAGIC_ZONE_PPC_ALIAS 2
-#define MAGIC_ZONE_FIREWALL 3
-#define MAGIC_ZONE_DMAMAP 4
-#define MAGIC_ZONE_SWTLB 5
-#define MAGIC_ZONE_MISSCNT 6
-#define MAGIC_ZONE_NODEMAP 7
-#define MAGIC_ZONE_PPR 8
-#define MAGIC_ZONE_PPC 9
-#define MAGIC_ZONE_MILO_ALIAS 10
-#define MAGIC_ZONE_EV5_ALIAS 10
-#define MAGIC_ZONE_NODECOMM 11 /* node communication zone */
- /* do not def zone 12: see below
why */
-#define MAGIC_ZONE_BDOOR_DEV 14 /* backdoor area for devices */
-#define MAGIC_ZONE_FPROM_ALIAS 15
-
-#ifndef SIMOS64BIT
-#undef MAGIC_ZONE_FPROM_ALIAS /* In 32bit Simos, 0xbfc00000
maps to... */
-#define MAGIC_ZONE_FPROM_ALIAS 12 /* ... zone 12 */
-#endif
-
-/** PPR numbering **/
-
-/* Individual MAGIC registers */
-
-#define MAGIC_PPR_IECHIGH 0x0000 /* r */
-#define MAGIC_PPR_ACKINTERNAL 0x0001 /* w */
-#define MAGIC_PPR_IECENABLE 0x0002 /* r/w */
-#define MAGIC_PPR_SENDIPI 0x0003 /* w */
-#define MAGIC_PPR_OPSPACE 0x0004 /* r/w */
-#define MAGIC_PPR_ASID 0x0005 /* r/w */
-#define MAGIC_PPR_TLBINVAL 0x0006 /* w */
-#define MAGIC_PPR_TLBINUSE 0x0007 /* r */
-#define MAGIC_PPR_MSGTAG 0x0008 /* r/w */
-#define MAGIC_PPR_STALLOSPC 0x0009 /* r/w */
-#define MAGIC_PPR_CYCLECOUNT 0x000a /* r */
-#define MAGIC_PPR_NETMSGTIME 0x000b /* r */
-#define MAGIC_PPR_RESERVED_C 0x000c /* */
-#define MAGIC_PPR_RESERVED_D 0x000d /* */
-#define MAGIC_PPR_RESERVED_E 0x000e /* */
-#define MAGIC_PPR_RESERVED_F 0x000f /* */
-
-#define MAGIC_PPR_UNUSED10 0x0010 /* r */
-#define MAGIC_PPR_PROTVERSION 0x0011 /* r */
-#define MAGIC_PPR_HWVERSION 0x0012 /* r */
-#define MAGIC_PPR_REMAPMASK 0x0013 /* r/w */
-#define MAGIC_PPR_PROTCONTROL 0x0014 /* r/w */
-#define MAGIC_PPR_RESERVED_15 0x0015 /* */
-#define MAGIC_PPR_RESERVED_16 0x0016 /* */
-#define MAGIC_PPR_RESERVED_17 0x0017 /* */
-#define MAGIC_PPR_OUTOFRANGE 0x0018 /* r */
-#define MAGIC_PPR_INTERVAL 0x0019 /* r/w */
-#define MAGIC_PPR_SLOTMAP 0x001a /* r/w */
-#define MAGIC_SLOTMAP_SLOT0_OFFS 0
-#define MAGIC_SLOTMAP_SLOT0_MASK 0x00000000000000FFLL
-#define MAGIC_SLOTMAP_SLOT1_OFFS 8
-#define MAGIC_SLOTMAP_SLOT1_MASK 0x000000000000FF00LL
-#define MAGIC_SLOTMAP_SLOT2_OFFS 16
-#define MAGIC_SLOTMAP_SLOT2_MASK 0x0000000000FF0000LL
-#define MAGIC_SLOTMAP_SLOT3_OFFS 24
-#define MAGIC_SLOTMAP_SLOT3_MASK 0x00000000FF000000LL
-#define MAGIC_PPR_FWSHIFT 0x001b /* r/w */
-#define MAGIC_PPR_RECOVERYSYNC 0x001c /* r */
-#define MAGIC_RECOVERYSYNC_PHASE_MASK 0xF000000000000000LL;
-#define MAGIC_RECOVERYSYNC_PHASE_SHIFT 60
-#define MAGIC_RECOVERYSYNC_PHASE_ZERO (0x0LL <<
MAGIC_RECOVERYSYNC_PHASE_SHIFT)
-#define MAGIC_RECOVERYSYNC_PHASE_ONE (0x1LL <<
MAGIC_RECOVERYSYNC_PHASE_SHIFT)
-#define MAGIC_RECOVERYSYNC_PHASE_TWO (0x2LL <<
MAGIC_RECOVERYSYNC_PHASE_SHIFT)
-#define MAGIC_RECOVERYSYNC_PHASE_THREE (0x3LL <<
MAGIC_RECOVERYSYNC_PHASE_SHIFT)
-#define MAGIC_RECOVERYSYNC_TIMESTAMP_MASK 0x0FFFFFFFFFFFFFFFLL
-#define MAGIC_RECOVERYSYNC_TIMESTAMP_SHIFT 0
-#define MAGIC_PPR_REPORT_DIAG_RESULT 0x001d /* w */
-#define MAGIC_REPORT_PASS_DIAG 0 /* other values indicate fail */
-#define MAGIC_PPR_RESERVED_1E 0x001e /* w */
-#define MAGIC_PPR_DRAIN_POLL 0x001f /* r */
-
-#define MAGIC_PPR_NODECONFIG 0x0020 /* r */
-#define MAGIC_NODECONFIG_THISNODE_OFFS 0
-#define MAGIC_NODECONFIG_THISNODE_MASK 0x0000000000000fffLL
-#define MAGIC_NODECONFIG_FIRSTNODE_OFFS 12
-#define MAGIC_NODECONFIG_FIRSTNODE_MASK 0x0000000000fff000LL
-#define MAGIC_NODECONFIG_NODESINCELL_OFFS 24
-#define MAGIC_NODECONFIG_NODESINCELL_MASK 0x0000000fff000000LL
-#define MAGIC_NODECONFIG_THISCELL_OFFS 36
-#define MAGIC_NODECONFIG_THISCELL_MASK 0x0000fff000000000LL
-#define MAGIC_NODECONFIG_NCELLS_OFFS 48
-#define MAGIC_NODECONFIG_NCELLS_MASK 0x0fff000000000000LL
-
-#define MAGIC_NODECONFIG_THISNODE(val) \
- (((val)&MAGIC_NODECONFIG_THISNODE_MASK)>>MAGIC_NODECONFIG_THISNODE_OFFS)
-#define MAGIC_NODECONFIG_FIRSTNODE(val) \
- (((val)&MAGIC_NODECONFIG_FIRSTNODE_MASK)>>MAGIC_NODECONFIG_FIRSTNODE_OFFS)
-#define MAGIC_NODECONFIG_NODESINCELL(val) \
- (((val)&MAGIC_NODECONFIG_NODESINCELL_MASK)>>MAGIC_NODECONFIG_NODESINCELL_OFFS)
-#define MAGIC_NODECONFIG_THISCELL(val) \
- (((val)&MAGIC_NODECONFIG_THISCELL_MASK)>>MAGIC_NODECONFIG_THISCELL_OFFS)
-#define MAGIC_NODECONFIG_NCELLS(val) \
- (((val)&MAGIC_NODECONFIG_NCELLS_MASK)>>MAGIC_NODECONFIG_NCELLS_OFFS)
-
-#define MAGIC_PPR_ADDRCONFIG 0x0021 /* r */
-#define MAGIC_ADDRCONFIG_PAGES_OFFS 0
-#define MAGIC_ADDRCONFIG_PAGES_MASK 0x0000ffffffffLL
-#define MAGIC_ADDRCONFIG_NNBITS_OFFS 32
-#define MAGIC_ADDRCONFIG_NNBITS_MASK 0x00ff00000000LL
-#define MAGIC_ADDRCONFIG_MASBITS_OFFS 40
-#define MAGIC_ADDRCONFIG_MASBITS_MASK 0xff0000000000LL
-
-#define MAGIC_ADDRCONFIG_PAGES(val) \
- (((val)&MAGIC_ADDRCONFIG_PAGES_MASK)>>MAGIC_ADDRCONFIG_PAGES_OFFS)
-#define MAGIC_ADDRCONFIG_NNBITS(val) \
- (((val)&MAGIC_ADDRCONFIG_NNBITS_MASK)>>MAGIC_ADDRCONFIG_NNBITS_OFFS)
-#define MAGIC_ADDRCONFIG_MASBITS(val) \
- (((val)&MAGIC_ADDRCONFIG_MASBITS_MASK)>>MAGIC_ADDRCONFIG_MASBITS_OFFS)
-
-/* OSPC mirror in uncached space (used by FPROM) */
-#define MAGIC_PPR_OSPC 0x1000 /* r */
-
-
-/** PPC error codes **/
-
-#define MAGIC_PPC_NOT_SUCCESSFUL_BIT 0x8000000000000000LL /* set for error */
-/* these return values should be ORed with the "not successful" bit */
-#define MAGIC_PPC_RETRY_CODE 0x00 /* please retry request
(default) */
-#define MAGIC_PPC_BADGROUP 0x01 /* PPC group was invalid */
-#define MAGIC_PPC_BADOPCODE 0x02 /* PPC opcode was invalid */
-#define MAGIC_PPC_ARGOUTOFRANGE 0x03 /* some arg to the PPC was bad */
-#define MAGIC_PPC_BUSY 0x04 /* operation needed some
- * resource that was unavail */
-/* these results indicate the request cannot be serviced, and it should
- not be retried. The interpretation of these is protocol-dependent
- One example is: the physical pages are remote. The application
- can't know this, but the sequence was otherwise valid. If a protocol
- can't handle remote pages, this is a possibility. So, e.g. fmemcpy
- uses PROT_FAIL1 to indicate it can't handle the pages. See the
- individual _interface files to describe the interpretation*/
-#define MAGIC_PPC_PROT_FAIL1 0x11
-#define MAGIC_PPC_PROT_FAIL2 0x12
-#define MAGIC_PPC_PROT_FAIL3 0x13
-#define MAGIC_PPC_RETRY
(MAGIC_PPC_NOT_SUCCESSFUL_BIT|MAGIC_PPC_RETRY_CODE)
-
-/** PPC groups **/
-
-#define MAGIC_PPC_GROUP_KERNEL 0x000
-#define MAGIC_PPC_GROUP_MSG 0x001
-
-/** kernel group opcodes **/
-
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