changeset 2d68a6a11e44 in /z/repo/m5
details: http://repo.m5sim.org/m5?cmd=changeset;node=2d68a6a11e44
description:
Add missing TSUNAMI ipi code.
diffstat:
system/alpha/palcode/platform.S | 17 +++++++++++++++++
1 files changed, 17 insertions(+), 0 deletions(-)
diffs (38 lines):
diff -r 96a3a31ead2a -r 2d68a6a11e44 system/alpha/palcode/platform.S
--- a/system/alpha/palcode/platform.S Tue Jun 28 23:22:28 2005 -0400
+++ b/system/alpha/palcode/platform.S Wed Jun 29 22:15:32 2005 -0400
@@ -313,17 +313,34 @@
and r16, MAXPROC, r14 // mask the top stuff: MAXPROC+1 CPUs supported
bis r31, 0x1, r16 // get a one
sll r16, r14, r14 // shift the bit to the right place
+#if defined(TSUNAMI) || defined(BIG_TSUNAMI)
+ sll r14,IPIQ_shift,r14
+#endif
+
//
// Build the Broadcast Space base address
//
+#if defined(TSUNAMI) || defined(BIG_TSUNAMI)
+ lda r16,0xf01(r31)
+ sll r16,32,r16
+ ldah r13,0xa0(r31)
+ sll r13,8,r13
+ bis r16,r13,r16
+ lda r16,IPIQ_addr(r16)
+#elif defined(TLASER)
lda r13, 0xff8e(r31) // Load the upper address bits
sll r13, 24, r13 // shift them to the top
+#endif
//
// Send out the IP Intr
//
+#if defined(TSUNAMI) || defined(BIG_TSUNAMI)
+ stq_p r14, 0(r16) // Tsunami MISC Register
+#elif defined(TLASER)
stq_p r14, 0x40(r13) // Write to TLIPINTR reg
+#endif
wmb // Push out the store
hw_rei
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