changeset a8dc5e12ee36 in /z/repo/m5
details: http://repo.m5sim.org/m5?cmd=changeset;node=a8dc5e12ee36
description:
inorder: update graduation unit
make sure instructions are able to commit before writing back to the RF
do not commit more than 1 non-speculative instruction per cycle
diffstat:
src/cpu/inorder/cpu.cc | 4 ++--
src/cpu/inorder/resources/graduation_unit.cc | 17 ++++++++++-------
src/cpu/inorder/resources/graduation_unit.hh | 4 +---
3 files changed, 13 insertions(+), 12 deletions(-)
diffs (77 lines):
diff -r 5485da0578d1 -r a8dc5e12ee36 src/cpu/inorder/cpu.cc
--- a/src/cpu/inorder/cpu.cc Fri Feb 18 14:29:48 2011 -0500
+++ b/src/cpu/inorder/cpu.cc Fri Feb 18 14:30:05 2011 -0500
@@ -465,12 +465,12 @@
W.needs(ExecUnit, ExecutionUnit::ExecuteInst);
}
+ W.needs(Grad, GraduationUnit::GraduateInst);
+
for (int idx=0; idx < inst->numDestRegs(); idx++) {
W.needs(RegManager, UseDefUnit::WriteDestReg, idx);
}
- W.needs(Grad, GraduationUnit::GraduateInst);
-
// Insert Back Schedule into our cache of
// resource schedules
addToSkedCache(inst, res_sked);
diff -r 5485da0578d1 -r a8dc5e12ee36
src/cpu/inorder/resources/graduation_unit.cc
--- a/src/cpu/inorder/resources/graduation_unit.cc Fri Feb 18 14:29:48
2011 -0500
+++ b/src/cpu/inorder/resources/graduation_unit.cc Fri Feb 18 14:30:05
2011 -0500
@@ -37,8 +37,7 @@
int res_latency, InOrderCPU *_cpu,
ThePipeline::Params *params)
: Resource(res_name, res_id, res_width, res_latency, _cpu),
- lastCycleGrad(0), numCycleGrad(0)
-
+ lastNonSpecTick(0)
{
for (ThreadID tid = 0; tid < ThePipeline::MaxThreads; tid++) {
nonSpecInstActive[tid] = &cpu->nonSpecInstActive[tid];
@@ -58,15 +57,18 @@
{
case GraduateInst:
{
- // Make sure this is the last thing on the resource schedule
- // @todo: replace this check
- // assert(inst->resSched.size() == 1);
+ if (lastNonSpecTick == curTick()) {
+ DPRINTF(InOrderGraduation, "Unable to graduate [sn:%i]. "
+ "Only 1 nonspec inst. per cycle can graduate.\n");
+ grad_req->done(false);
+ return;
+ }
- // Handle Any Faults Before Graduating Instruction
+ // Handle Any Faults Before Graduating Instruction
if (inst->fault != NoFault) {
cpu->trap(inst->fault, tid, inst);
grad_req->setCompleted(false);
- return;
+ return;
}
DPRINTF(InOrderGraduation,
@@ -81,6 +83,7 @@
DPRINTF(InOrderGraduation,
"[tid:%i] Non-speculative inst [sn:%i] graduated\n",
tid, inst->seqNum);
+ lastNonSpecTick = curTick();
}
if (inst->traceData) {
diff -r 5485da0578d1 -r a8dc5e12ee36
src/cpu/inorder/resources/graduation_unit.hh
--- a/src/cpu/inorder/resources/graduation_unit.hh Fri Feb 18 14:29:48
2011 -0500
+++ b/src/cpu/inorder/resources/graduation_unit.hh Fri Feb 18 14:30:05
2011 -0500
@@ -57,9 +57,7 @@
void execute(int slot_num);
protected:
- Tick lastCycleGrad;
- int numCycleGrad;
-
+ Tick lastNonSpecTick;
bool *nonSpecInstActive[ThePipeline::MaxThreads];
InstSeqNum *nonSpecSeqNum[ThePipeline::MaxThreads];
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