changeset 5143254707ed in /z/repo/m5
details: http://repo.m5sim.org/m5?cmd=changeset;node=5143254707ed
description:
ARM: Make Noop actually decode to a noop and set it's instflags.
diffstat:
src/arch/arm/isa/insts/misc.isa | 3 ++-
src/arch/arm/isa_traits.hh | 2 +-
2 files changed, 3 insertions(+), 2 deletions(-)
diffs (25 lines):
diff -r 5b111ae7e7d4 -r 5143254707ed src/arch/arm/isa/insts/misc.isa
--- a/src/arch/arm/isa/insts/misc.isa Wed Feb 23 15:10:49 2011 -0600
+++ b/src/arch/arm/isa/insts/misc.isa Wed Feb 23 15:10:49 2011 -0600
@@ -477,7 +477,8 @@
exec_output += BasicExecute.subst(bkptIop)
nopIop = InstObjParams("nop", "NopInst", "PredOp", \
- { "code" : "", "predicate_test" : predicateTest })
+ { "code" : "", "predicate_test" : predicateTest },
+ ['IsNop'])
header_output += BasicDeclare.subst(nopIop)
decoder_output += BasicConstructor.subst(nopIop)
exec_output += PredOpExecute.subst(nopIop)
diff -r 5b111ae7e7d4 -r 5143254707ed src/arch/arm/isa_traits.hh
--- a/src/arch/arm/isa_traits.hh Wed Feb 23 15:10:49 2011 -0600
+++ b/src/arch/arm/isa_traits.hh Wed Feb 23 15:10:49 2011 -0600
@@ -97,7 +97,7 @@
const Addr PAddrImplMask = (ULL(1) << PABits) - 1;
// return a no-op instruction... used for instruction fetch faults
- const ExtMachInst NoopMachInst = 0xE320F000;
+ const ExtMachInst NoopMachInst = 0x01E320F000ULL;
const int LogVMPageSize = 12; // 4K bytes
const int VMPageSize = (1 << LogVMPageSize);
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