[m5-dev] changeset in m5: ARM: NEON instruction templates modified to set...

[Giacomo Gabrielli]

changeset 128afe2b3a35 in /z/repo/m5
details: http://repo.m5sim.org/m5?cmd=changeset;node=128afe2b3a35
description:
        ARM: NEON instruction templates modified to set the predicate flag to 
false when needed.

diffstat:

 src/arch/arm/isa/templates/macromem.isa |   2 ++
 src/arch/arm/isa/templates/mem.isa      |  15 ++++++++++++---
 src/arch/arm/isa/templates/neon.isa     |   4 ++++
 3 files changed, 18 insertions(+), 3 deletions(-)

diffs (79 lines):

diff -r 7bf6fccab013 -r 128afe2b3a35 src/arch/arm/isa/templates/macromem.isa
--- a/src/arch/arm/isa/templates/macromem.isa   Wed Feb 23 15:10:49 2011 -0600
+++ b/src/arch/arm/isa/templates/macromem.isa   Wed Feb 23 15:10:50 2011 -0600
@@ -202,6 +202,8 @@
             {
                 %(op_wb)s;
             }
+        } else {
+            xc->setPredicate(false);
         }
 
         if (fault == NoFault && machInst.itstateMask != 0) {
diff -r 7bf6fccab013 -r 128afe2b3a35 src/arch/arm/isa/templates/mem.isa
--- a/src/arch/arm/isa/templates/mem.isa        Wed Feb 23 15:10:49 2011 -0600
+++ b/src/arch/arm/isa/templates/mem.isa        Wed Feb 23 15:10:50 2011 -0600
@@ -234,6 +234,8 @@
             if (fault == NoFault) {
                 %(op_wb)s;
             }
+        } else {
+            xc->setPredicate(false);
         }
 
         if (fault == NoFault && machInst.itstateMask != 0 &&
@@ -313,6 +315,8 @@
             if (fault == NoFault) {
                 %(op_wb)s;
             }
+        } else {
+            xc->setPredicate(false);
         }
 
         if (fault == NoFault && machInst.itstateMask != 0 &&
@@ -459,6 +463,8 @@
                 fault = xc->writeBytes(memUnion.bytes, %(size)d, EA,
                                        memAccessFlags, NULL);
             }
+        } else {
+            xc->setPredicate(false);
         }
 
         if (fault == NoFault && machInst.itstateMask != 0 &&
@@ -515,9 +521,12 @@
             if (fault == NoFault) {
                 fault = xc->readBytes(EA, NULL, %(size)d, memAccessFlags);
             }
-        } else if (fault == NoFault && machInst.itstateMask != 0 &&
-                (!isMicroop() || isLastMicroop())) {
-            xc->setMiscReg(MISCREG_ITSTATE, machInst.newItstate);
+        } else {
+            xc->setPredicate(false);
+            if (fault == NoFault && machInst.itstateMask != 0 &&
+                   (!isMicroop() || isLastMicroop())) {
+                xc->setMiscReg(MISCREG_ITSTATE, machInst.newItstate);
+            }
         }
 
         return fault;
diff -r 7bf6fccab013 -r 128afe2b3a35 src/arch/arm/isa/templates/neon.isa
--- a/src/arch/arm/isa/templates/neon.isa       Wed Feb 23 15:10:49 2011 -0600
+++ b/src/arch/arm/isa/templates/neon.isa       Wed Feb 23 15:10:50 2011 -0600
@@ -225,6 +225,8 @@
             {
                 %(op_wb)s;
             }
+        } else {
+            xc->setPredicate(false);
         }
 
         if (fault == NoFault && machInst.itstateMask != 0) {
@@ -275,6 +277,8 @@
             {
                 %(op_wb)s;
             }
+        } else {
+            xc->setPredicate(false);
         }
 
         if (fault == NoFault && machInst.itstateMask != 0) {
_______________________________________________
m5-dev mailing list
m5-dev@m5sim.org
http://m5sim.org/mailman/listinfo/m5-dev