changeset 323e63527496 in /z/repo/m5
details: http://repo.m5sim.org/m5?cmd=changeset;node=323e63527496
description:
ARM: Set ITSTATE correctly after FlushPipe
diffstat:
src/arch/arm/faults.cc | 1 +
1 files changed, 1 insertions(+), 0 deletions(-)
diffs (11 lines):
diff -r dc266f3bcae4 -r 323e63527496 src/arch/arm/faults.cc
--- a/src/arch/arm/faults.cc Wed Feb 23 15:10:50 2011 -0600
+++ b/src/arch/arm/faults.cc Wed Feb 23 15:10:50 2011 -0600
@@ -220,6 +220,7 @@
// start refetching from the next instruction.
PCState pc = tc->pcState();
assert(inst);
+ pc.forcedItState(inst->machInst.newItstate);
inst->advancePC(pc);
tc->pcState(pc);
}
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