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I can't verify 100% that the code in your new function is correct, but I don't see anything obviously wrong. I really like that you consolidated the same code in two places down to the one. There's one issue which is pointed out below. src/cpu/base_dyn_inst.hh <http://reviews.m5sim.org/r/520/#comment1405> This comment is inaccurate. It's really the largest address that's part of the request, which is the effective address plus the size and then minus one. Also, this feels like a temporary variable promoted to too large of a scope and/or permanence. "size" seems like it would be more generally useful, it would be more immediately obvious what it is, and you can go from one to the other easily like you are elsewhere in this change. - Gabe On 2011-03-30 08:41:48, Ali Saidi wrote: > > ----------------------------------------------------------- > This is an automatically generated e-mail. To reply, visit: > http://reviews.m5sim.org/r/520/ > ----------------------------------------------------------- > > (Updated 2011-03-30 08:41:48) > > > Review request for Default, Ali Saidi, Gabe Black, Steve Reinhardt, and > Nathan Binkert. > > > Summary > ------- > > O3: Tighten memory order violation checking to 16 bytes. > > The comment in the code suggests that the checking granularity should be 16 > bytes, however in reality the shift by 8 is 256 bytes which seems much > larger than required. > > > Diffs > ----- > > src/cpu/base_dyn_inst.hh d54b7775a6b0 > src/cpu/o3/O3CPU.py d54b7775a6b0 > src/cpu/o3/lsq_unit.hh d54b7775a6b0 > src/cpu/o3/lsq_unit_impl.hh d54b7775a6b0 > > Diff: http://reviews.m5sim.org/r/520/diff > > > Testing > ------- > > > Thanks, > > Ali > > _______________________________________________ m5-dev mailing list [email protected] http://m5sim.org/mailman/listinfo/m5-dev
