> On 2011-03-30 09:29:31, Gabe Black wrote: > > src/arch/arm/faults.cc, line 233 > > <http://reviews.m5sim.org/r/617/diff/1/?file=11355#file11355line233> > > > > The "Faults" trace flag can be useful during boot to see where things > > go haywire since early on there shouldn't be any, at least in ISAs with > > hardware TLB miss handlers. Perhaps you should make this and any other > > artificial faults use FaultsVerbose or similar so they get ignored unless > > you really wanted to see them.
It's extraordinarily rare that this occurs. The number of things that have to occur are numerous. You have to be running with O3, execute a branch instruction, predict the branch as taken, that prediction has to have an entry in the BTB, the BTB entry has to miss in the TLB, a table walk has to occur to satisfy the miss, and MISCREG_CONTEXIDR has to be written while all this happens. At boot this is never going to happen because the context isn't going to change. I'm inclined to leave it as is. - Ali ----------------------------------------------------------- This is an automatically generated e-mail. To reply, visit: http://reviews.m5sim.org/r/617/#review1037 ----------------------------------------------------------- On 2011-03-30 09:05:28, Ali Saidi wrote: > > ----------------------------------------------------------- > This is an automatically generated e-mail. To reply, visit: > http://reviews.m5sim.org/r/617/ > ----------------------------------------------------------- > > (Updated 2011-03-30 09:05:28) > > > Review request for Default, Ali Saidi, Gabe Black, Steve Reinhardt, and > Nathan Binkert. > > > Summary > ------- > > ARM: Fix table walk going on while ASID changes error > > > Diffs > ----- > > src/arch/arm/faults.hh d54b7775a6b0 > src/arch/arm/faults.cc d54b7775a6b0 > src/arch/arm/table_walker.cc d54b7775a6b0 > src/arch/arm/tlb.cc d54b7775a6b0 > > Diff: http://reviews.m5sim.org/r/617/diff > > > Testing > ------- > > > Thanks, > > Ali > > _______________________________________________ m5-dev mailing list [email protected] http://m5sim.org/mailman/listinfo/m5-dev
