changeset de679a068dd8 in /z/repo/m5 details: http://repo.m5sim.org/m5?cmd=changeset;node=de679a068dd8 description: X86: When decoding a memory only inst, fault on reg encodings, don't assert.
This change makes the decoder figure out if an instruction that only supports memory is using a register encoding and decodes directly to "Unknown" which will behave appropriately. This prevents other parts of the instruction creation process from seeing the mismatch and asserting. diffstat: src/arch/x86/isa/specialize.isa | 13 ++++++++++++- 1 files changed, 12 insertions(+), 1 deletions(-) diffs (30 lines): diff -r 6e368a935ac0 -r de679a068dd8 src/arch/x86/isa/specialize.isa --- a/src/arch/x86/isa/specialize.isa Fri Apr 22 10:18:51 2011 -0700 +++ b/src/arch/x86/isa/specialize.isa Sat Apr 23 15:02:29 2011 -0700 @@ -96,6 +96,15 @@ }}; let {{ + def doBadInstDecode(): + blocks = OutputBlocks() + blocks.decode_block = ''' + return new Unknown(machInst); + ''' + return blocks +}}; + +let {{ class OpType(object): parser = re.compile(r"(?P<tag>[A-Z]+)(?P<size>[a-z]*)|(r(?P<reg>[A-Z0-9]+)(?P<rsize>[a-z]*))") def __init__(self, opTypeString): @@ -146,7 +155,9 @@ # This refers to memory. The macroop constructor sets up modrm # addressing. Non memory modrm settings should cause an error. env.doModRM = True - return doRipRelativeDecode(Name, opTypes, env) + return doSplitDecode("MODRM_MOD", + {"3" : (doBadInstDecode,) }, + (doRipRelativeDecode, Name, opTypes, env)) elif opType.tag == None or opType.size == None: raise Exception, "Problem parsing operand tag: %s" % opType.tag elif opType.tag == "C": _______________________________________________ m5-dev mailing list m5-dev@m5sim.org http://m5sim.org/mailman/listinfo/m5-dev