changeset 82057507f2f9 in /z/repo/m5
details: http://repo.m5sim.org/m5?cmd=changeset;node=82057507f2f9
description:
O3: Fix a small corner case with the lsq hazard detection logic.
diffstat:
src/cpu/o3/lsq_unit_impl.hh | 3 +--
1 files changed, 1 insertions(+), 2 deletions(-)
diffs (13 lines):
diff -r 1d3733d3acee -r 82057507f2f9 src/cpu/o3/lsq_unit_impl.hh
--- a/src/cpu/o3/lsq_unit_impl.hh Wed May 04 20:38:26 2011 -0500
+++ b/src/cpu/o3/lsq_unit_impl.hh Wed May 04 20:38:26 2011 -0500
@@ -465,8 +465,7 @@
Addr ld_eff_addr2 =
(ld_inst->effAddr + ld_inst->effSize - 1) >> depCheckShift;
- if ((inst_eff_addr2 > ld_eff_addr1 && inst_eff_addr1 < ld_eff_addr2) ||
- inst_eff_addr1 == ld_eff_addr1) {
+ if (inst_eff_addr2 >= ld_eff_addr1 && inst_eff_addr1 <= ld_eff_addr2) {
// A load/store incorrectly passed this load/store.
// Check if we already have a violator, or if it's newer
// squash and refetch.
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