changeset c38905a6fa32 in /z/repo/m5
details: http://repo.m5sim.org/m5?cmd=changeset;node=c38905a6fa32
description:
ARM: Implement WFE/WFI/SEV semantics.
diffstat:
src/arch/arm/interrupts.hh | 13 +++++++++++++
src/arch/arm/isa/insts/data.isa | 1 +
src/arch/arm/isa/insts/macromem.isa | 1 +
src/arch/arm/isa/insts/misc.isa | 18 +++++++++++++-----
src/arch/arm/system.hh | 2 +-
5 files changed, 29 insertions(+), 6 deletions(-)
diffs (102 lines):
diff -r 2fcad6253525 -r c38905a6fa32 src/arch/arm/interrupts.hh
--- a/src/arch/arm/interrupts.hh Wed May 04 20:38:28 2011 -0500
+++ b/src/arch/arm/interrupts.hh Wed May 04 20:38:28 2011 -0500
@@ -137,6 +137,19 @@
(interrupts[INT_RST]));
}
+ /**
+ * Check the raw interrupt state.
+ * This function is used to check if a wfi operation should sleep. If there
+ * is an interrupt pending, even if it's masked, wfi doesn't sleep.
+ * @return any interrupts pending
+ */
+ bool
+ checkRaw() const
+ {
+ return intStatus;
+ }
+
+
Fault
getInterrupt(ThreadContext *tc)
{
diff -r 2fcad6253525 -r c38905a6fa32 src/arch/arm/isa/insts/data.isa
--- a/src/arch/arm/isa/insts/data.isa Wed May 04 20:38:28 2011 -0500
+++ b/src/arch/arm/isa/insts/data.isa Wed May 04 20:38:28 2011 -0500
@@ -247,6 +247,7 @@
NextJazelle = ((CPSR)newCpsr).j;
NextItState = ((((CPSR)newCpsr).it2 << 2) & 0xFC)
| (((CPSR)newCpsr).it1 & 0x3);
+ SevMailbox = 1;
'''
buildImmDataInst(mnem + 's', code, flagType,
suffix = "ImmPclr", buildCc = False,
diff -r 2fcad6253525 -r c38905a6fa32 src/arch/arm/isa/insts/macromem.isa
--- a/src/arch/arm/isa/insts/macromem.isa Wed May 04 20:38:28 2011 -0500
+++ b/src/arch/arm/isa/insts/macromem.isa Wed May 04 20:38:28 2011 -0500
@@ -96,6 +96,7 @@
IWNPC = cSwap(%s, cpsr.e) | ((Spsr & 0x20) ? 1 : 0);
NextItState = ((((CPSR)Spsr).it2 << 2) & 0xFC)
| (((CPSR)Spsr).it1 & 0x3);
+ SevMailbox = 1;
'''
microLdrRetUopIop = InstObjParams('ldr_ret_uop', 'MicroLdrRetUop',
diff -r 2fcad6253525 -r c38905a6fa32 src/arch/arm/isa/insts/misc.isa
--- a/src/arch/arm/isa/insts/misc.isa Wed May 04 20:38:28 2011 -0500
+++ b/src/arch/arm/isa/insts/misc.isa Wed May 04 20:38:28 2011 -0500
@@ -483,11 +483,10 @@
wfeCode = '''
#if FULL_SYSTEM
- if (SevMailbox) {
+ if (SevMailbox == 1) {
SevMailbox = 0;
PseudoInst::quiesceSkip(xc->tcBase());
- }
- else {
+ } else {
PseudoInst::quiesce(xc->tcBase());
}
#endif
@@ -501,7 +500,12 @@
wfiCode = '''
#if FULL_SYSTEM
- PseudoInst::quiesce(xc->tcBase());
+ // WFI doesn't sleep if interrupts are pending (masked or not)
+ if (xc->tcBase()->getCpuPtr()->getInterruptController()->checkRaw()) {
+ PseudoInst::quiesceSkip(xc->tcBase());
+ } else {
+ PseudoInst::quiesce(xc->tcBase());
+ }
#endif
'''
wfiIop = InstObjParams("wfi", "WfiInst", "PredOp", \
@@ -517,8 +521,12 @@
System *sys = xc->tcBase()->getSystemPtr();
for (int x = 0; x < sys->numContexts(); x++) {
ThreadContext *oc = sys->getThreadContext(x);
- if (oc != xc->tcBase()) {
+ if (oc == xc->tcBase())
+ continue;
+ // Only wake if they were sleeping
+ if (oc->readMiscReg(MISCREG_SEV_MAILBOX) == 0) {
oc->setMiscReg(MISCREG_SEV_MAILBOX, 1);
+ PseudoInst::wakeCPU(xc->tcBase(), x);
}
}
'''
diff -r 2fcad6253525 -r c38905a6fa32 src/arch/arm/system.hh
--- a/src/arch/arm/system.hh Wed May 04 20:38:28 2011 -0500
+++ b/src/arch/arm/system.hh Wed May 04 20:38:28 2011 -0500
@@ -53,7 +53,7 @@
class ArmSystem : public System
{
- private:
+ protected:
/**
* PC based event to skip the dprink() call and emulate its
* functionality
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