On Sat, 9 Jul 2011, Nilay Vaish wrote:
The miscellaneous registers MISCREG_*_EFF_BASE are not part of the
architectural state. How can these be computed using the architecturally
visibile registers?
Thanks
Nilay
I am getting a fault when the following instruction gets executed. I am
wondering which of the registers might have a faulty value. Is there a way
to figure some thing out?
RET_NEAR : ld t1w, SS:[sp] : MemRead : A=0x8158
EA = 33112
Data = 0
Index = 0
Base = 140735772197208
SegBase = 0
These are values that are read from the registers (in
atomic_simple_cpu_exec.cc) and EA is the computed value, which I
understand would the actually index from which t1w would be loaded.
What exactly is going on in this instruction?
--
Nilay
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