Hi all, I'm trying to add a new type similar to a DMA controller to a SLICC protocol that I am currently developing. My problem is that when I try to connect the object up to a sequencer I get this error: gem5.opt: build/X86_SE/mem/ruby/system/RubyPort.cc:64: virtual void RubyPort::init(): Assertion `m_controller != __null' failed.
I tracked the issue down to line 493 in src/mem/ruby/slicc/symbols/StateMachine.py. It seems like only if the name of the object is "L1Cache" or "DMA" will the files generated by SLICC actually connect the object to a sequencer. I would like to have more than one type of object that I can connect to sequencers. To fix the problem I have changed line 493 to: if self.ident == "L1Cache" or self.ident == "CE": Is there a better way to fix this problem? A more elegant solution, or maybe I'm missing something obvious? Also, from what I can tell, since I'm using syscall emulation mode, there is no way for me to use the DMA object, although I may be mistaken. Thanks for the help, Jason ------ Jason Power University of Wisconsin-Madison, Department of Computer Sciences [email protected]
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