[gem5-users] Simulating Intel Clovertown with Gem5

[Hamid Reza Khaleghzadeh]

Hello

I want to simulate Intel Clovertown multicore processor with Gem5
(Following schema)

P0     P1          P2     P3
 |_____|             |_____|
      |                       |
     L2                    L2
      |_____________|
                  |
             Memory

Each processor has one L1 cache.

I think network topology of Clovertown must be implemented in Gem5.
Could you tell if cache coherency protocols must be updated in this
case?

Thanks.
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