Hi, I am running m5.debug 2.0 for the ARM_FS configuration, using DRAMMemory in FSConfig.py. I am using the vmlinux.arm.smp.fb.2.6.38.8 kernel image and arm-ubuntu-natty-headless disk image, running single core spec2k6 benchmarks.
During the boot process, the simulator fails with the following error message. m5.debug: build/ARM_FS/cpu/o3/decode_impl.hh:452: void DefaultDecode<Impl>::sortInsts() [with Impl = O3CPUImpl]: Assertion `insts[tid].empty()' failed. My command line is ./build/ARM_FS/m5.debug configs/example/fs.py --script=/spec2k6/1core/gcc.rcS --detailed --caches --l2cache --clock 3000MHz --l1i_size 64kB --l1d_size 64kB --l1i_assoc 4 --l1d_assoc 4 --l2_size 512kB --l2_assoc 8 --cacheline_size 64 Can anyone help shed light on why this could be happening? I have not made any changes to the core cpu model, although some functionality has been added to DRAM code. Thanks, Manu
_______________________________________________ gem5-users mailing list [email protected] http://m5sim.org/cgi-bin/mailman/listinfo/gem5-users
