Hi Bojun,
See below
On 09/08/12 04:22, Bojun Ma wrote:
Hi, All,
I have some questions about multi core full system simulation:
1. Is there any way that I can specify the chip area in a CMP
configuration?
No, gem5 is not aware of area.
2.For ARM FS mode, If I do not use checkpoint, can I use the
detail CPU mode from the beginning to boot the system?
Why don't you try it and see what happens?
3.Any one has the successful experience of integrate McPAT or any
other power model with gem5? I try to use and modify m5-mcpat-parse.py
code( by Richard Strong), but the generated input XML for McPAT can
not run in power simulation. Any suggestion?
What do you mean by "integrate"--compiling McPAT and gem5 into one
binary or plugging the output from gem5 into McPAT? I know people are
trying to do both, but I'm not aware of anything that works and is
available publicly.
I suggest you come up with your own way of converting gem5 output into
McPAT input. As a start, search this and the gem5-dev mailing lists for
McPAT to see what's already been said. Going from gem5 to McPAT is
pretty easy. It's getting sensible results out of McPAT that is difficult.
4.Is Ruby supported in ARM FS in the latest version of gem5? What
is the default coherence cache protocol for classic memory system?
Maybe someone with more experience using gem5 caches can answer this. I
think I've seen some talk on gem5-dev about getting Ruby to work with ARM.
Thanks in advance.
Regards,
Bojun Ma
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