Hi Shaoming, The behaviour you see is a result of how the clock period is resolved currently, with the value being determined when the object is instantiated (and the L1 only being instantiated once). We have some ongoing work to enable functionality similar to what you describe and you should see some patches shortly.
Andreas On 08/05/2013 19:08, "shaoming" <[email protected]> wrote: >Dear Gem5 Author: > > I am trying to implement DVFS in gem5 by switching new CPUs with >different frequencies. Actually it works for cores nicely, but does not >adjust the attached L1 cache correspondingly. For an example if the >frequency of the old core is 2GHz, the frequency for its L1 cache will >be fixed at 2GHz, regardless of the frequencies of new cores. I think >the frequency of the L1 cache should be consistent with the core, which >shares clock tree with its private cache. Could anyone tell me how to >adjust the frequency of L1 cache during running time? > >Thanks >Shaoming Chen >_______________________________________________ >gem5-users mailing list >[email protected] >http://m5sim.org/cgi-bin/mailman/listinfo/gem5-users > -- IMPORTANT NOTICE: The contents of this email and any attachments are confidential and may also be privileged. If you are not the intended recipient, please notify the sender immediately and do not disclose the contents to any other person, use it for any purpose, or store or copy the information in any medium. Thank you. _______________________________________________ gem5-users mailing list [email protected] http://m5sim.org/cgi-bin/mailman/listinfo/gem5-users
