Hello, With a specific bench, I encountered the warnings:
warn: instruction 'fldcw_Mw' unimplemented warn: instruction 'fld' unimplemented warn: instruction 'fld' unimplemented warn: instruction 'fstp' unimplemented warn: instruction 'fmul' unimplemented ... I'd like to know what exactly does it imply on the simulation: is it just a nop? Are there any cache accesses anyway? Also, I would like to know what can I do about that issue. I tried to compile with soft fp for x86 with no success. Thank you for your help. Regards, Maxime.
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