Hi all,
I created my own O3CPU class by mimicking what is done for O3_ARM_v7a. I
also created classes for L1I/D and L2 Caches to accompany my O3 model.
I modified configs/common/CacheConfig.py so that when I run with
cpu-type=my_cpu I get MyCPUL1D, MyCPUL1I and MyCPUL2 as caches (still
exactly like for O3_ARM_V7a).
The thing is, in CacheConfig.py, caches are instantiated in the
following manner:
system.l2 =
l2_cache_class(clk_domain=system.cpu_clk_domain,size=options.l2_size,assoc=options.l2_assoc)
icache = icache_class(size=options.l1i_size, assoc=options.l1i_assoc)
dcache = dcache_class(size=options.l1d_size, assoc=options.l1d_assoc)
That is, whatever the cache sizes defined in MyCPU.py (or for that matter, in
O3_ARM_v7a.py), the caches will be instantiated with the values put in the
command line.
Where it hurts is that if you don't specify anything in the command line, it
will use the default values set in configs/common/Options.py. As a result,
while I thought I was using a 32kB D-cache (as defined in MyCPU.py), i really
used a 64kB one.
Similarly, for O3_ARM_v7a, the I-cache size is defined as being 64kB in
O3_ARM_V7a.py, but in configs/common/Options.py it is set to 32kB.
Can anyone check its config.ini files to confirm this (This could also be a
mistake on my side :))?
Thanks,
--
Arthur Perais
INRIA Bretagne Atlantique
Bâtiment 12E, Bureau E303, Campus de Beaulieu
35042 Rennes, France
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