Thank you Andreas for the time you have put for answering my queries. Regards, Geeta
On Wed, Jun 11, 2014 at 1:21 PM, Andreas Hansson <[email protected]> wrote: > Hi Geeta, > > This is not unique to gem5 or any simulation. I’m referring to the > synchronisation primitives used by the workload. If you were to run the > same code on two machines you would see changes as well. Slightly different > timings lead to slightly different behaviour, and slightly different inter > leavings in locks and synchronisation. > > Andreas > > From: Geeta Patil <[email protected]> > Date: Wednesday, 11 June 2014 04:11 > To: Andreas Hansson <[email protected]> > Cc: gem5 users mailing list <[email protected]> > Subject: Re: [gem5-users] Cache Coherency Statistic Output > > > Hi Andreas, > > Thank you for your reply. > > I used MI protocol by using : > scons build/ALPHA/gem5.opt PROTOCOL=MI_example RUBY=True > I am using ruby_fs system and command used is: > ./build/ALPHA/gem5.opt configs/example/ruby_fs.py -n 2 --l1i_size=32kB > --l1d_size=32kB --l2_size=8MB --num-l2caches=8 -b barnes > Changed protocol from MI_example to MESI_Cmp_Directory and again > executed ALPHA ruby_fs using the same command. > > Only parameter I have changed is coherency protocol and I git the > difference in number of instructions simulated. > > Where I find more information about usage of LOCK/UNLOCK operations > used by cache coherency protocol in gem5. > > Thank You, > Geeta > > > > > On Tue, Jun 10, 2014 at 1:09 PM, Andreas Hansson <[email protected]> > wrote: > >> Hi Geeta, >> >> This has been discussed quite a few times, so I’d suggest you do a >> search on the archive. >> >> In short, there are a number of reasons this happens, and without >> knowing more about your use-case (full system or not, etc), I would guess >> the reason is simply differences in acquiring/releasing locks. >> >> Andreas >> >> From: Geeta Patil via gem5-users <[email protected]> >> Reply-To: Geeta Patil <[email protected]>, gem5 users >> mailing list <[email protected]> >> Date: Tuesday, 10 June 2014 06:24 >> To: "[email protected]" <[email protected]> >> Subject: [gem5-users] Cache Coherency Statistic Output >> >> Hi All, >> >> I have executed barens(splash2 benchmark program) using MI and MESI >> protocol. >> >> I am finding number of instructions simulated. When I checked the >> statistic file, number of instructions simulated using MI protocol are >> 12184940560 and number of instructions simulated using MI protocol are >> 12174567882. >> >> I am not able to understand when I am executing same program why is >> there difference of 10372678 between number of instructions simulated. >> >> I want to understand why there is difference. >> >> Can any body help me. >> >> Thank You, >> Geeta >> >> >> >> -- IMPORTANT NOTICE: The contents of this email and any attachments are >> confidential and may also be privileged. If you are not the intended >> recipient, please notify the sender immediately and do not disclose the >> contents to any other person, use it for any purpose, or store or copy the >> information in any medium. Thank you. >> >> ARM Limited, Registered office 110 Fulbourn Road, Cambridge CB1 9NJ, >> Registered in England & Wales, Company No: 2557590 >> ARM Holdings plc, Registered office 110 Fulbourn Road, Cambridge CB1 9NJ, >> Registered in England & Wales, Company No: 2548782 >> > > > -- IMPORTANT NOTICE: The contents of this email and any attachments are > confidential and may also be privileged. If you are not the intended > recipient, please notify the sender immediately and do not disclose the > contents to any other person, use it for any purpose, or store or copy the > information in any medium. Thank you. > > ARM Limited, Registered office 110 Fulbourn Road, Cambridge CB1 9NJ, > Registered in England & Wales, Company No: 2557590 > ARM Holdings plc, Registered office 110 Fulbourn Road, Cambridge CB1 9NJ, > Registered in England & Wales, Company No: 2548782 >
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