Hi Andreas,

I tried the alpha first. I found I have set up this ISA and I rebuild it for 
this test.
It can only support 4 timing simple alpha cores. And when I set the number of 
cpu to 5, the m5 terminal output indicates CPU #4 (which is the 5th cpu) is 
stuck. 
So can I say it can only support 4 cpu? What should I do if I want to support 
more (like 16) cpus in classical memory system with alpha timing core?
 
Thanks!

On Aug 27, 2014, at 3:48 PM, Andreas Hansson <andreas.hans...@arm.com> wrote:

> Hi Chao,
> 
> Unfortunately the classic memory system does not support X86 atomic RMW 
> operations. This is why it works in atomic and not in timing.
> 
> You options are:
> 1) implement a fix and do everyone a big favour (I vote for this one)
> 2) take the hit in simulation speed and switch to Ruby and stick to timing 
> mode
> 3) use another ISA, e.g. ARM :-), that does not have this problem
> 
> I hope that explains it.
> 
> Andreas
> 
> From: Chao Zhang via gem5-users <gem5-users@gem5.org>
> Reply-To: Chao Zhang <zhang.c...@pku.edu.cn>, gem5 users mailing list 
> <gem5-users@gem5.org>
> Date: Wednesday, 27 August 2014 07:47
> To: gem5 users mailing list <gem5-users@gem5.org>
> Subject: [gem5-users] How many cpu does the x86 vmlinux SMP kernel support?
> 
> Dear all,
> 
> I’m currently working on x86 FS on classical memory system to simulate cache 
> system. But I found the kernel booting just hangs before loading benchmark 
> script. It does not work when I set 3 or more x86 timing simple cpus, but it 
> does work when I set them as atomic cores. And it also works when I set cpu 
> number to 1. The gem5 change set version is 10242, the kernel is the SMP 
> version from gem5 website (x86_64-vmlinux-2.6.28.4-smp), and I use default 
> fs.py configuration. 
> 
> So I want to know how many x86 timing cores does this SMP kernel support? Or 
> is this a memory system problem? 
> 
> Chao Zhang
> Peking University
> 
> 
> 
> 
> 
> 
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