Dear All, I am running a full-system ARM simulation (aarch-system-2014-10/vmlinux.aarch32.ll_20131205.0-gem5).
I intend to flush the L1 and L2 caches in my device driver. For the L1 cache, I succeed without any problem, but for the L2 cache when I use *outer_clean_range()*, nothing happens, and when I use *outer_cache.flush_range()*, I get a kernel fault (null pointer). Also, I get in the messages that the following instructions are not implemented: warn: instruction 'mcr icialluis' unimplemented warn: instruction 'mcr dccimvac' unimplemented warn: instruction 'mcr dccmvau' unimplemented warn: instruction 'mcr icimvau' unimplemented Can anybody help me with this issue? Thanks in advance, Best Regards, -- Erfan Azarkhish Micrel Lab - Viale Carlo Pepoli 3/2 - 40123, Bologna DEI - University of Bologna, Italy https://www.linkedin.com/in/erfanazarkhish
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